Study on fabrication conditions of the interface-treated trilayer junctions

IEEE Trans. Appl. Supercond.

Wakita

et al. 2005

Self Cite

The authors have investigated the structure and the composition of the barrier in YBCO vertically-stacked-type interface-treated Josephson junctions by TEM and TEM-EDS. The barrier was formed by the Ar ion milling of the base YBCO electrode surface and the subsequent annealing. For a sample treated with accelerating voltage ( acc ) of 1300 V, we observed Y 2 O 3 phases in the barrier. In contrast, for a sample with acc = 700 V, we could observe few Y 2 O 3 phases. Our TEM observation suggested that junctions with higher c fabricated with lower acc would have thinner and more uniform barriers. In addition, the composition of the barrier was Y-rich and Cu-poor, and such deviation decreased with decreasing acc . These tendencies well correspond to the results for ramp-edge-type junctions reported so far.

“…The authors previously reported that increased with decreasing [12]. The authors also observed that the 1 spread of for junctions on one chip decreased with increasing [13].…”

Section: Resultsmentioning

confidence: 63%

Analysis of the Barrier in Vertically-Stacked Interface-Treated Josephson Junctions

Inoue

IEEE Trans. Appl. Supercond.

Wakita

et al. 2005

Self Cite

“…Because of the scatter of the properties, we could not find a definite dependence on these parameters. If we focused on the modulation depth of I c for an external magnetic field, we found that the modulation depth is slightly larger at higher V acc [10]. As for the PGO deposition process [8], we found a reduction in excess current of the junctions, and a reduction in I c to 1/10 per 0.5 PGO unit cell.…”

Section: Resultsmentioning

confidence: 77%

Investigation of the electrical properties of vertically stacked interface-treated Josephson junctions

Supercond. Sci. Technol.

Izawa

Wakita

et al. 2004

In order to understand the barrier structure of vertically stacked-type interface-treated Josephson junctions, we compared the electrical properties of the stacked junctions with those of ramp-edge junctions. With increasing critical current density (Jc), IcRn products for both types of junction increased and the spread of critical current decreased. Nevertheless, the stacked junctions had higher IcRn products and lower spreads than those of ramp-edge junctions with Jc of the same order. Moreover, we investigated the temperature dependence of the critical current and the conductance for junctions with Jc values of around 103 A cm−2. No significant difference was found for the dependence of Ic. In contrast, the conductance of stacked junctions somewhat increased with increasing temperature, which resulted in the reduction of IcRn. The reduction is small at 4.2–30 K; we thus think that the reduction is negligible for applications.

“…These parameters were well investigated for ramp-edge geometry, and their controllability of junction characteristics was confirmed [9]. We focused on the dependence of the modulation depth of critical current on V acc and P ann [10]. The modulation depth of junctions on one chip was measured by applying an external magnetic field to a junction on the chip and it was evaluated from how much the critical current of the junction was suppressed.…”

Section: Acc [V] Modulation Depth [%]mentioning

confidence: 99%

High-temperature superconductor vertically-stacked Josephson junctions

Supercond. Sci. Technol.

Kito

Izawa

et al. 2002

We study vertically-stacked interface-treated Josephson junctions (ITJs). The barriers of ITJs are formed by Ar ion etching and subsequent annealing, not by depositing an artificial barrier. We have investigated the dependences of the junction properties on the processing parameters. It is found that the control of junction properties can be realized by controlling the incidence angle of Ar, and that the higher accelerating voltage of Ar reduces leakage paths in a barrier. Moreover, we have successfully eliminated the excess current of the junctions using the PrGaO3 (PGO) doping process. We conclude that the conjunction of the interface treatment and the PGO doping technique leads to highly integrated Josephson circuits.