Soft secondary electron programming for floating gate NOR flash EEPROMs

Abstract

A novel scheme called Soft Secondary Electron Programming (SSEP) is introduced and shown to be a promising programming mechanism for scaled NOR Flash EEPROMs. SSEP involves use of an "optimum" V B that results in a lower drain disturb compared to both Channel Hot Electron (CHE) and CHannel Initiated Secondary Electron (CHISEL) mechanisms. The concept behind minimizing drain disturb is discussed. SSEP is shown to give faster programming and lower disturb than CHE at all operating conditions, and better program/disturb margin compared to CHISEL at similar program speed or disturb time.

Using Soft Secondary Electron Programming to Reduce Drain Disturb in Floating-Gate NOR Flash EEPROMs

“…The objective of this paper is to demonstrate and validate the concept of SSEP. This is an enhanced version of the work presented in [21], with the addition of results on program/erase (P/E) cycling endurance and discussion on post-cycling disturb.…”