Simulation study for suppressing corner effect in a saddle MOSFET for Sub-50 nm high density high performance DRAM cell transistor

Abstract

Saddle MOSFET (S-MOSFET), a device with a recess channel having tri-gate controllability over the channel, shows improved characteristics in controlling short channel effects and higher drive current compared with conventional recessed channel devices [1]. On the other hand, tri-gated structure has some disadvantages caused by corner effect, which can result in unstable threshold voltage (V th ) characteristics by early turn-on. This premature corner inversion leads to several problems like lower V th , larger leakage current and the I on /I off ratio degradation, consequently [2,3]. In this work, we have examined the reasons for the abnormal corner effect, its impact on the device characteristics, and possible approaches to suppress it. The corner effect in S-MOSFET resembles that of bulk FINFET [4] and thus should be dealt accordingly. Simulations have been performed on Sentaurus, a drift-diffusion based 3-D device simulator [5]. Device is designed using Sentaurus Process Emulator. Hurkx [6] band-to-band tunneling model is combined with Shockley-Read-Hall recombination to simulate realistic values of OFF-state leakage current. Fig. 1(a) shows the 3-D schematic view of the S-MOSFET while Fig. 1(b) shows its cross sectional view across the silicon body. Width of Si-fin and its portion overlapped by poly-gate is shown as W fin =44 nm and H fin =50 nm, respectively. The gate length (L g ) is 44 nm; gate oxide thickness (t ox ) is 5.7 nm; recess depth is 120 nm. Body doping (N a ) is uniform and ranges from 9×10 17 cm -3 to 3×10 18 cm -3 , depending upon requirement of the situation. Fig. 2 shows V th vs. radius of corner rounding (R). V th has shown an increase of about 45% as R is increased from 0 nm to 20 nm. This indicates the impact of variation in corner shape on the electrical characteristics of the device. Sharper the corner, lower is the V th . This significant change in V th is because of the fact that the corner regions have the highest electron density (E-density) in the channel even in weak inversion regime. Thus the corners turn on earlier than the main channel region and are responsible for lower V th . Fig. 3(a) shows cross-sectional view of Si-fin with such bias conditions which keep operation of the device in sub-threshold regime. Figures 3(a) and (b) show that E-density at the corner is much higher than rest of the channel. The higher E-density is because of the electric field crowding at the sharp corners and it is also responsible for higher leakage current as is reported in [2]. Further investigation of the corner effect is carried out at different gate biases and is shown in Fig. 4. n corner and n center represent E-density at corners and center of the channel, respectively, and their ratio indicates the intensity of the corner effect. From the figure it is clear that corner effect is more prominent in sub-threshold region and the corners have the highest E-density just below V th (0.6~0.8 V). Thus, on this stage, the device operation is fully dependent on the corners. However, at V GS~Vth , t...

Efeitos da radiação de prótons em FinFET\'s de porta tripla de corpo (Bulk-FinFET).

“…Este efeito faz com que ocorra uma inversão de cargas prematuramente nessas regiões. Devido à inversão prematura nessa região, surge uma tensão de limiar referente aos cantos das aletas (31). Porém este efeito é somente representativo se a dopagem do canal for maior que 10 17 cm -…”