SiGe HBT Technology: Future Trends and TCAD-Based Roadmap

Schröter, M.; Rosenbaum, Tommy; Chevalier, P.; Heinemann, B.; Preisler, Ed; Böck, J.; Mukherjee, A.

doi:10.1109/jproc.2015.2500024

Cited by 147 publications

(59 citation statements)

References 44 publications

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“…Additional studies are required to rule on the potential of the architecture to reach even higher performance (cf. the roadmap presented in [9]) in 28-nm FDSOI, or in another CMOS node. Vertical profile modification, required to raise fr, will likely call for a further reduction the process thermal budget.…”

Section: Discussionmentioning

confidence: 99%

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Advanced Si/SiGe HBT architecture for 28-nm FD-SOI BiCMOS

Céli

Zimmer

et al. 2016

2016 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)

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This paper presents a novel Fully Self-Aligned (FSA) in [9]). In order to achieve this goal, the architecture is fIrstly Si/SiGe HBT architecture using Selective Epitaxial Growth evaluated and optimized by TCAD simulation before (SEG) and featuring an Epitaxial eXtrinsic Base Isolated from launching the fabrication process trials.the Collector (EXBIC). The one is integrated into the bulk area of the 28-nm FD-SOI CMOS technology developed atThe fIrst part of the paper presents the fabrication process STMicroelectronics. All the parameters of the architecture such flow and the key features of the EXBIC architecture. In the as the boron-doped base link, the emitter width and height, the second part, electrical performances of this architecture pedestal oxide and sidewall thicknesses are evaluated by TCAD integrated into the bulk area part (called "NO SO" for No SOl) simulation. A low base-collector capacitance, independent from of the C28FD are systematically evaluated by TCAD the extrinsic base doping is obtained. Optimized architecture simulations. All the technological parameters of the exhibits 420 GHZ/T and 780 GHZ/MAX. architecture such as the boron in-situ doped base link, the emitter width and height, the pedestal oxide and sidewall Keywords-BiCMOS, SiGe HBT, FD-SOl, TCAD, thicknesses are thoroughly investigated. The results are architecture, thermal budget, vertical profile.discussed in the last section, where we also draw the conclusion I.

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Section: Discussionmentioning

confidence: 99%

“…

the Collector (EXBIC).

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mentioning

confidence: 99%

Advanced Si/SiGe HBT architecture for 28-nm FD-SOI BiCMOS

Céli

Zimmer

et al. 2016

2016 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)

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“…T HE state-of-the-art silicon germanium heterojunction bipolar transistors (SiGe HBTs) are attractive for millimeter-wave applications and allow good performances in the subterahertz range [1], [2]. SiGe technology can still be preferred to other technologies dedicated to high-power applications, especially because of its good performances and low cost, making it a good choice for mass production markets [3]- [5].…”

Section: Introductionmentioning

confidence: 99%

“…SiGe technology can still be preferred to other technologies dedicated to high-power applications, especially because of its good performances and low cost, making it a good choice for mass production markets [3]- [5]. The promising process developments of this technology are made possible because of the continuous support of technology computer-aided design (TCAD), compact modeling, and characterization activities [1], [6], [7].…”

Section: Introductionmentioning

confidence: 99%

Innovative SiGe HBT Topologies With Improved Electrothermal Behavior

D'Esposito

Fregonèse

Chakravorty

et al. 2016

IEEE Trans. Electron Devices

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This paper investigates alternative topologies of silicon germanium heterojunction bipolar transistors designed and fabricated in the state-of-the-art BiCMOS process from STMicroelectronics for improved safe-operating characteristics. Electrical and thermal behaviors of various structures are analyzed and compared, along with a detailed discussion on drawbacks and advantages. The test structures under study are different in terms of emitter-finger layouts as well as the metal stacks in the back-end-of-line. It is observed that the multifinger transistor structures having nonuniform finger lengths with wider area enclosed by the deep trench and higher metallization stacks yield an improved thermal behavior. Therefore, the safe-operating area of multifinger transistors can be extended without degrading the RF performances.Index Terms-Back-end-of-line (BEOL), deep trench, emitter layouts, multifinger transistors, safe-operating area (SOA), silicon germanium heterojunction bipolar transistors (SiGe HBTs), thermal resistance. 0018-9383

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“…This is especially true for InP HBTs due to the much lower DC current gain compared to, e.g., SiGe HBTs. The impact of R B is expected to increase with advancing technology nodes due to shrinking vertical dimensions and correspondingly higher contact and partially also sheet resistances [6,7]. A large number of methods exist in the literature for the determination of R B [8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25] with, unfortunately, widely varying results when applied to the same transistor (e.g.…”

Section: Introductionmentioning

confidence: 99%