SEU characterization and design dependence of the SA3300 microprocessor

Sexton, F.W.; Treece, R.K.; Hass, K.J.; Hughes, K.L.; Hash, G.L.; Axness, Carl L.; Büchner, S.; Kang, Keith

doi:10.1109/23.101202

Cited by 12 publications

(1 citation statement)

References 20 publications

(9 reference statements)

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“…When the necessary resistance exceeds 100 kΩ it becomes difficult to manufacture polysilicon resistors that are both small and consistent in value. Furthermore, these lightly doped resistors have a large negative temperature coefficient [89,90].…”

Section: Seu-resistant Latch Circuitsmentioning

confidence: 99%

Magnetic Random Access Memory for Embedded Computing

Donohoe¹

2007

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Public reporting burden for this collection of information is estimated to average 1 hour per response, including the time for reviewing instructions, searching existing data sources, gathering and maintaining the data needed, and completing and reviewing this collection of information. MRAM_II_2007-Final SPONSORING / MONITORING AGENCY NAME(S) AND ADDRESS(ES) 10. SPONSOR/MONITOR'S ACRONYM(S)Air Force Research Laboratory AFRL/RVSE Space Vehicles Directorate 3550 Aberdeen Ave. SE SPONSOR/MONITOR'S REPORTKirtland AFB, NM 87117-5776 NUMBER(S) AFRL-RV-PS-TR-2007-1196 DISTRIBUTION / AVAILABILITY STATEMENTApproved for public release; distribution is unlimited. (Clearance #VS07-0688) SUPPLEMENTARY NOTESThis report is published in the interest of scientific and technical information exchange. The established procedures for editing reports were not followed for this technical report. ABSTRACTThe goal of this research was to develop an embedded magnetic memory technology to be integrated into Complementary Metal Oxide Semiconductor (CMOS) integrated circuit fabrication process to provide radiation-hard, logic elements and small random-access memories. The goal is not to provide largescale, bulk memory, but latches and flip flops that serve as state and data registers for sequential logic, and configuration registers for configurable logic. The benefits to spacecraft systems include the ability to power-down a subsystem while retaining system state, thus saving energy until the subsystem is required. The subsystem can then be powered-up and begin operating in milliseconds. The technology is based on a unique, PacMan-shaped magnetic tunneling junction (MTJ) cell developed at the University of Idaho. The focus of this research is to refine the PacMan cell to make it practical for integration into CMOS circuits, to develop CMOS circuits that employ the magnetic cells, and to integrate the cells onto a CMOS process. The process produced two circuit designs based on magnetic memory elements: a magnetic latch, and a magnetic shadow memory to serve as a backup to volatile electronic memory. ii University of Idaho report MRAM_II_2007-Final SUBJECT TERMS CMOS, MTJ Cell

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Section: Seu-resistant Latch Circuitsmentioning

confidence: 99%

Magnetic Random Access Memory for Embedded Computing

Donohoe¹

2007

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Radiation Effects

Schwank

Sexton

1999

Wiley Encyclopedia of Electrical and Electronics Engineering

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Radiation Effects

Schwank¹,

Sexton²,

Dodd³

et al. 2005

Encyclopedia of RF and Microwave Engineering

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The effects of the space radiation environment on semiconductor device response are reviewed. Semiconductor devices in space can be exposed to energetic particles that can cause device degradation and system failure. The space environment consists primarily of protons, electrons, and heavy ions. Ionizing radiation (electrons and protons) can induce significant charge buildup in oxides, causing large threshold voltage shifts, and decreases in carrier mobility and bipolar transistor gain. This can result in large increases in the static power current of an IC, degradation in timing, and potential loss of functionality. In the space environment, heavy ions and protons can cause single‐event effects. There are two general classes of single‐event effects: soft errors and hard errors. Soft errors cause no permanent damage and may be correctable. Single‐event upsets are one type of soft error. If the error rate caused by soft errors is too high, performance degradation and even system failure can result. Hard errors cause permanent damage to devices. As integrated circuit technologies advance, they are becoming more prone to soft errors caused by energetic ions. In fact, soft errors caused by energetic particles present in the terrestrial environment and emitted from metal impurities are rapidly making single‐event upset a major reliability concern for ground‐based commercial ICs.

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SEU characterization and design dependence of the SA3300 microprocessor

Cited by 12 publications

References 20 publications

Magnetic Random Access Memory for Embedded Computing

Magnetic Random Access Memory for Embedded Computing

Radiation Effects

Radiation Effects

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