Self-heating characterization for SOI MOSFET based on AC output conductance

Wei, Jin; Fung, S.K.H.; Liu, Weidong; Chan, Peggy; Hu, Chenming

doi:10.1109/iedm.1999.823873

Cited by 28 publications

(1 citation statement)

References 4 publications

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“…First, since SOI devices reduce short channel effects, parasitic capacitance and leakage current, a multi-gate device can be fabricated on an SOI wafer. Such an approach may ameliorate the above problems, but not the floating body effect [11] or selfheating issues [12] due to carriers impacting within the body. Second, therefore, a body tie can be used to address these remaining issues.…”

Section: Introductionmentioning

confidence: 99%

A 2D simulation study and characterization of a novel vertical SOI MOSFET with a smart source/body tie

Lin¹,

Lee²,

Lin³

2008

Semicond. Sci. Technol.

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A novel vertical silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) with a smart source/body contact, SSBVMOS, is presented here for the first time. 2D simulations reveal that the SSBVMOS reduces self-heating effects, with the lattice temperature reduced by 14% and the hole temperature reduced by 25%. The SSBVMOS also eliminates the floating body effect, something that other SOI vertical MOSFETs are unable to accomplish, regardless of the thickness of the thin film. The SSBVMOS is further found to have a better drain-induced barrier lowering and subthreshold swing than either a conventional vertical MOSFET or an SOI vertical MOSFET. Moreover, these results are achieved using typical pillar heights and buried oxide thicknesses. Should future technological advances allow for lower pillars or thinner buried oxides, the SSBVMOS performance would further increase.

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Section: Introductionmentioning

confidence: 99%