2014 24th International Conference on Field Programmable Logic and Applications (FPL) 2014
DOI: 10.1109/fpl.2014.6927393
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Scalable parallel architecture for singular value decomposition of large matrices

Unai Martinez-Corral1,
Koldo Basterretxea
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Raul Finker3
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Cited by 4 publications
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References 11 publications
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Channel Estimation in Massive MIMO: Algorithm and Hardware

Tang
1
,
Liu
2
,
Ling
3
et al. 2016
Communications in Computer and Information Science
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Channel Estimation in Massive MIMO: Algorithm and Hardware

Tang
1
,
Liu
2
,
Ling
3
et al. 2016
Communications in Computer and Information Science
1
0
0
0
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FPGA based system for real-time structure from motion computation

Komorkiewicz1,
Kryjak
2
,
Chuchacz-Kowalczyk3
et al. 2015
2015 Conference on Design and Architectures for Signal and Image Processing (DASIP)
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Behavioral Implementation of SVD on FPGA

Tian
1
,
Sima
2
,
McGuire
3
2018
2018 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT)
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