2002
DOI: 10.1016/s0263-2241(01)00028-8
|View full text |Cite
|
Sign up to set email alerts
|

Sampling clock jitter effects in digital-to-analog converters

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
8
0
2

Year Published

2006
2006
2020
2020

Publication Types

Select...
5
3
1

Relationship

0
9

Authors

Journals

citations
Cited by 30 publications
(10 citation statements)
references
References 11 publications
0
8
0
2
Order By: Relevance
“…When the Rx filtering is not matched to the Tx pulse shape and the optical channel, this can result in insufficient electrical bandwidth and noise enhancement. The proposed method leverages Tx and Rx static filters compensation capability, of the channel frequency response, such that they effectively constitute a matched filter pair hence maximizing SNR at the input of the Rx adaptive filters [54,55]. With the filtering models representing real optical links and components, as well as the emulation of PDL, we showed an improvement in overall system performance.…”
Section: Discussionmentioning
confidence: 97%
“…When the Rx filtering is not matched to the Tx pulse shape and the optical channel, this can result in insufficient electrical bandwidth and noise enhancement. The proposed method leverages Tx and Rx static filters compensation capability, of the channel frequency response, such that they effectively constitute a matched filter pair hence maximizing SNR at the input of the Rx adaptive filters [54,55]. With the filtering models representing real optical links and components, as well as the emulation of PDL, we showed an improvement in overall system performance.…”
Section: Discussionmentioning
confidence: 97%
“…The effects of clock modulation can be modelled by an additive term that contains a discrete sequence of short pulses typically disjoint from each other, as sketched in Figure. 2. This term can be modelled as: (6) where: (7) in which sign(.) is the signum function.…”
Section: B Clock Modulationmentioning
confidence: 99%
“…is a major limitation on the bit resolution (effective number of bits) of these devices, (Reinhardt, 2005). In (Kurosawa, 2002) authors analyze the clock jitter effects on DACs, ( Fig. 1 therein), considering a DAC where a digital input is applied with a sampling clock CLK.…”
Section: Introductionmentioning
confidence: 99%