Resist charging effect in photomask: Its impact on pattern placement error and critical dimension

Choi, Jin; Nam, Dong Seok; Kim, Byung Gook; Woo, Sang-Gyun; Cho, Han Ku

doi:10.1116/1.2978406

Cited by 2 publications

(2 citation statements)

References 12 publications

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“…This is the result of the fact that the patterns in M1A and M1B are complementary. We attribute these fingerprints to charging during the mask writing process as is well described in references [12,13], either or not in combination with a resist Charging Effect Correction (CEC) [14]. The same interpretation can be applied to the small cross that we measured which represents the device placement error.…”

Section: Discussionmentioning

confidence: 58%

Dense mask registration fingerprint characterization to better understand and mitigate the metrology to device offset

van Haren,

Steinert,

Mouraille

et al. 2023

Photomask Technology 2023

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Over the past years, we have demonstrated that off-line mask registration measurements as measured by the Zeiss PROVE tool correlate very well (R2 > 0.96) with the on-wafer measurements. The first correlation study was based on scanner wafer alignment marks. Wafer alignment marks are metrology structures that can be readout by the alignment sensor inside the scanner. After we established the correlation, we continued the investigation by exploring overlay metrology targets. Also in this case, a very good correlation (R2 > 0.92) was found in the sub-nanometer regime. This could be achieved due the fact that overlay metrology targets are much smaller in size compared to the scanner wafer alignment marks. This enables the possibility to measure basically the same target areas by the PROVE and the ASML Yieldstar (YS:375) overlay metrology tool. The resulting residual level between mask and on-wafer measurements was less than 0.14-nm (99.7%) at wafer level (1×). The small mismatch that was remaining could be attributed to local mask writing variations inside the overlay metrology targets. The local variations triggered us to consider the mask writing impact on the placement errors for individual device features. Even for this case at device level, a very good correlation was observed between the mask registration measurements and the on-wafer results. This time, the on-wafer results were obtained by using a large field-of-view SEM. From all the findings above, we can basically conclude that off-line mask registration measurements can be used as overlay predictors in a production environment. This enables computational overlay metrology from scanner alignment marks, to overlay metrology targets, down to single device features. It might be obvious that these findings could be very helpful in predicting the mask overlay contribution as part of the intra-field overlay contribution without actually performing the onwafer measurements and consequently reducing the fab cycle time. At this point, we would like to zoom out and consider how all the acquired knowledge can be utilized in a production environment. Basically, the mask-related local placement errors of all features within the exposure field on a wafer can be predicted accurately based on off-line mask measurements. However, before improving the on-product overlay and hence the yield, more insight is required on how the mask writing fingerprint looks like. Do we see a global fingerprint or do local effects dominate the fingerprint? Is the fingerprint the same for the overlay metrology targets and device? Or do we observe a metrology to device (MTD) offset? In this paper, we will show a dense characterization of the mask registration fingerprint. Off-line measurements were done on overlay metrology targets as well as on a structure representing the device pattern. We will show how the overlay metrology sampling layout selection will impact the device overlay performance. Based on this understanding, we aim at providing a strategy and a path forward on how to mitigat...

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Section: Discussionmentioning

confidence: 58%

Dense mask registration fingerprint characterization to better understand and mitigate the metrology to device offset

van Haren,

Steinert,

Mouraille

et al. 2023

Photomask Technology 2023

View full text Add to dashboard Cite

show abstract

“…Since the overlay error between two masks should be considered for double patterning lithography, requirement of image placement error should be reduced by 70% of single patterning process. There are several source of placement error on mask such as grid error, charging effect on resist [1] , measurement error [2] , distortion due to the pellicle mounting [3] and beam positioning error [4][5] and so on. (Figure 2) These sources of error have studied in many research groups in order to reduce the troubles that caused by position error of pattern on mask.…”

Section: Introductionmentioning

confidence: 99%

Deflector contamination in E-beam mask writer and its effect on pattern placement error of photomask for sub 20nm device node

et al. 2012

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One of the concerned phenomena that influencing to the performance of electron beam mask writer is contamination of deflector. Previous studies show that the relation between the deflector contamination and pattern placement error. In fact, the source of the contamination of deflector was not defined clearly yet. However, the fact that of deflector contamination clearly influences the pattern placement error on mask fabrication. We think that there is no detailed investigation about the effect of deflector contamination on the pattern placement error of production photomask. This paper will describe the effect of e-beam positioning error due to the contamination of deflector in electron optic system. To reduce the placement error by the deflector contamination circumstance the e-beam drift was evaluated in various conditions of deflection based on the theoretical assumption and our own modeling, and optimization of the deflection condition. Furthermore, we will present the requirements on position accuracy of deflector for the photomask of sub 20nm device node.

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Resist charging effect in photomask: Its impact on pattern placement error and critical dimension

Cited by 2 publications

References 12 publications

Dense mask registration fingerprint characterization to better understand and mitigate the metrology to device offset

Dense mask registration fingerprint characterization to better understand and mitigate the metrology to device offset

Deflector contamination in E-beam mask writer and its effect on pattern placement error of photomask for sub 20nm device node

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