Reconfigurable field effect transistors: A technology enablers perspective

Mikolajick, Thomas; Galderisi, Giulio; Rai, Shubham; Simon, Maik; Böckle, Raphael; Sistani, Masiar; Cakirlar, C.; Bhattacharjee, Niladri; Mauersberger, Tom; Heinzig, André; Kumar, Akash; Weber, Walter M.; Trommer, Jens

doi:10.1016/j.sse.2022.108381

Cited by 32 publications

(18 citation statements)

References 117 publications

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“…However, classical scalability is limited [2] and the static nature of the MOSFET primitives was not developed to provide runtimeadaptability as required for new circuit paradigms. A concept to overcome the static nature in CMOS technology and reduce overall circuit area and power consumption are reconfigurable FETs (RFETs), [3][4][5] encompassing a broad family of devices that enable a reconfiguration of the dominant carrier type based on either Schottky-barrier field-effect transistors (SBFET), [4,[6][7][8][9] or steep slope band-to-band tunneling transistors (TFET), [10][11][12][13] capable of dynamically altering the device operation between n-and p-type. This device concept thus gives rise to a paradigm change where devices, circuits, and even systems are actively and dynamically reconfigured after manufacturing or, as particularly noteworthy, even during run-time, enabling an adaption to the needed logic function of a circuit.…”

mentioning

confidence: 99%

Reconfigurable Complementary and Combinational Logic Based on Monolithic and Single‐Crystalline Al‐Si Heterostructures

Böckle

Sistani

Bažíková

et al. 2022

Adv Elect Materials

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Modern society is highly depending and relying on electronic computing devices, as for example, employed in efficient servers, personal computers, and mobiles, and currently being explored toward the realization of emerging computing paradigms, such as "artificial intelligence" and the "Internet of Things". [1] A key enabler for these paradigms is the complementary metal-oxide-semiconductor (CMOS) technology, which utilizes the concept of complementary n-and p-type field-effect transistors (FET) to construct Boolean logic gates. Importantly, in CMOS technology the logic functions are fixed by the physical layout of interconnects and the definition of doped regions and thus do not allow for a flexible alteration of the circuits after production. The continuous shrinking of feature sizes of these Si metal-oxide-semiconductor field-effect transistors (MOSFETs) has been providing performance enhancement and higher power efficiency throughout the last decades. However, classical scalability is limited [2] and the static nature of the MOSFET primitives was not developed to provide runtimeadaptability as required for new circuit paradigms. A concept to overcome the static nature in CMOS technology and reduce overall circuit area and power consumption are reconfigurable FETs (RFETs), [3][4][5] encompassing a broad family of devices that enable a reconfiguration of the dominant carrier type based on either Schottky-barrier field-effect transistors (SBFET), [4,[6][7][8][9] or steep slope band-to-band tunneling transistors (TFET), [10][11][12][13] capable of dynamically altering the device operation between n-and p-type. This device concept thus gives rise to a paradigm change where devices, circuits, and even systems are actively and dynamically reconfigured after manufacturing or, as particularly noteworthy, even during run-time, enabling an adaption to the needed logic function of a circuit. Importantly, this "fine-grain" approach is fundamentally different to the already available "coarse-grain" approach followed in field programmable gate arrays (FPGAs) [14] based on signal routing to predefined logic blocks, resulting in high latency in data Metal-semiconductor heterostructures providing geometrically reproducible and abrupt Schottky nanojunctions are highly anticipated for the realization of emerging electronic technologies. This specifically holds for reconfigurable field-effect transistors, capable of dynamically altering the operation mode between n-or p-type even during run-time. Targeting the enhancement of fabrication reproducibility and electrical balancing between operation modes, here a nanoscale Al-Si-Al nanowire heterostructure with single elementary, monocrystalline Al leads and sharp Schottky junctions is implemented. Utilizing a three top-gate architecture, reconfiguration on transistor level is enabled. Having devised symmetric on-currents as well as threshold voltages for n-and p-type operation as a necessary requirement to exploit complementary reconfigurable circuits, selected implementations of log...

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confidence: 99%

Reconfigurable Complementary and Combinational Logic Based on Monolithic and Single‐Crystalline Al‐Si Heterostructures

Böckle

Sistani

Bažíková

et al. 2022

Adv Elect Materials

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“…Based on intrinsic channels, their conduction mechanism leans on electrostatic doping instead of on the presence of impurities. [ 29 ] In order to properly understand how those devices work, it is possible to imagine, as a starting point, a Schottky barrier field‐effect transistor (SBFET). At the interface between a semiconductor channel and source/drain contacts, Schottky junctions are generally created: the shape of these potential barriers can be modulated by an electric field, when both the junctions get gated together and steered by a voltage.…”

Section: Rfetsmentioning

confidence: 99%

Insights into the Temperature‐Dependent Switching Behavior of Three‐Gated Reconfigurable Field‐Effect Transistors

Galderisi

Beyer

Mikolajick

et al. 2023

Physica Status Solidi (a)

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Three‐gated reconfigurable field‐effect transistors are innovative nanoelectronic devices that are rapidly and increasingly attracting substantial interest in several fields of application thanks to their inherent n/p‐type reconfiguration capabilities. For this reason, it is of significant importance to acquire a deeper knowledge about the temperature ranges in which such devices can be operated and, at the same time, gather a better understanding of the physical mechanisms that are involved in their operation. To achieve this aim, in‐depth observations about the functioning of such devices in an ultrawide temperature range, spanning from 80 to 475 K, are performed and are presented for their ambipolar and low V normalT operation modes. In view of the data exhibited herein, it is possible to assess the performances of three‐gated reconfigurable field‐effect transistors within a considerable temperature span and finally provide significant insights on the temperature‐dependent physical mechanisms regulating their functionality.

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“…[ 6–9 ] However, these devices are hard to integrate the nonvolatility and runtime reconfigurability due to the fixed carrier polarity in the semiconductor determined by the intrinsic physical doping. Emerging nonvolatile SBFETs with the dopant‐free channel usually show the inherently tunable polarity of carriers to enable reconfigurability, [ 10,11 ] by utilizing dual or triple independent gates to control the carrier injection from source and drain, [ 12–15 ] which is one prospective unit to build reconfigurable in‐memory processing architecture, eliminating the requirement of an applied program voltage permanently while taking advantages on multivalent memory operation. [ 16 ]…”

Section: Introductionmentioning

confidence: 99%

“…[6][7][8][9] However, these devices are hard to integrate the nonvolatility and runtime reconfigurability due to the fixed carrier polarity in the semiconductor determined by the intrinsic physical doping. Emerging nonvolatile SBFETs with the dopant-free channel usually show the inherently tunable polarity of carriers to enable reconfigurability, [10,11] by utilizing dual or triple independent gates to control the carrier injection from source and drain, [12][13][14][15] which is one prospective unit to build reconfigurable in-memory processing architecture, eliminating the requirement of an applied program voltage permanently while taking advantages on multivalent memory operation. [16] Vertically stacking metal-semiconductor-metal (MSM) structure based on the van der Waals semimetals and semiconductors is the promising candidate to build the SBFET due to the unique properties of the van der Waals materials such as atomic thickness and the high sensitivity to the external fields.…”

mentioning

confidence: 99%

Vertical Nonvolatile Schottky‐Barrier‐Field‐Effect Transistor with Self‐Gating Semimetal Contact

Zhou

Tong

Chen

et al. 2023

Adv Funct Materials

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Emerging 2D nonvolatile Schottky‐barrier‐field‐effect transistors (NSBFETs) are envisaged to build a promising reconfigurable in‐memory architecture to mimic the brain. Herein, a vertically stacked multilayered graphene (MGr)‐molybdenum disufide (MoS2)‐tungsten ditelluride (WTe2) NSBFET is reported. The semimetal WTe2 with the charge‐trapping effect enables the simultaneous integration of the electrode and the self‐gating function. The effective Schottky barrier height offset ΔΦB is programed from ΔΦB‐p = 132.6 meV to ΔΦB‐n = 109.4 meV, inducing the reversed built‐in electric field to make the NSBFET, so as to provide one with a multifunctional platform to integrate the nonvolatility and the reconfigurable self‐powered photo response. The reversible open‐circuit voltages of NSBFET synapse are programmed from −0.1 to 0.25 V and the self‐powered responsivity with reversed signs is tuned from 290 to −50 mA W−1, which enables the representation of a signed weight in a single device to enrich multiple optical sensing and computing capabilities.

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Reconfigurable field effect transistors: A technology enablers perspective

Cited by 32 publications

References 117 publications

Reconfigurable Complementary and Combinational Logic Based on Monolithic and Single‐Crystalline Al‐Si Heterostructures

Reconfigurable Complementary and Combinational Logic Based on Monolithic and Single‐Crystalline Al‐Si Heterostructures

Insights into the Temperature‐Dependent Switching Behavior of Three‐Gated Reconfigurable Field‐Effect Transistors

Vertical Nonvolatile Schottky‐Barrier‐Field‐Effect Transistor with Self‐Gating Semimetal Contact

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