Random Telegraph Signal-Like Fluctuation Created by Fowler–Nordheim Stress in Gate Induced Drain Leakage Current of the Saddle Type Dynamic Random Access Memory Cell Transistor

Kim, Heesang; Oh, Byoungchan; Kim, Kyungdo; Cha, Seon-Yong; Jeong, Jae-Goan; Hong, Seongin; Lee, Jong-Ho; Park, Byung‐Gook; Shin, Hyungcheol

doi:10.1143/jjap.49.094102

Cited by 9 publications

(4 citation statements)

References 20 publications

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“…Previous work has shown that each VRT cell spends an exponentially distributed amount of time in each state [14,31], and that the distribution of time constants for these exponential distributions is itself exponentially distributed [15]. The shape of our observed distributions appear to be consistent with this prior work.…”

Section: Time Between State Changessupporting

confidence: 87%

“…This is because the charge trapping process that is believed to cause a retention time change is a memoryless random process [14]. (This is why time spent in each retention time state is exponentially distributed.)…”

Section: Implications For Retention Time Profilingmentioning

confidence: 99%

“…These works established the key properties of VRT: the existence of multiple retention time states in VRT cells and the exponentially-distributed nature of the amount of time spent in each state. Since then, interest in VRT has focused on identifying its physical cause, primarily by measuring circuit-level features such as leakage currents [3,14,15,16,25,27,29]. No recent work we are aware of has evaluated the impact of VRT in modern DRAM devices.…”

Section: Variable Retention Timementioning

confidence: 99%

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An experimental study of data retention behavior in modern DRAM devices

LiuJamie

JaiyenBen

KimYoongu

et al. 2013

SIGARCH Comput. Archit. News

176

403

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DRAM cells store data in the form of charge on a capacitor. This charge leaks off over time, eventually causing data to be lost. To prevent this data loss from occurring, DRAM cells must be periodically refreshed. Unfortunately, DRAM refresh operations waste energy and also degrade system performance by interfering with memory requests. These problems are expected to worsen as DRAM density increases.The amount of time that a DRAM cell can safely retain data without being refreshed is called the cell's retention time. In current systems, all DRAM cells are refreshed at the rate required to guarantee the integrity of the cell with the shortest retention time, resulting in unnecessary refreshes for cells with longer retention times. Prior work has proposed to reduce unnecessary refreshes by exploiting differences in retention time among DRAM cells; however, such mechanisms require knowledge of each cell's retention time.In this paper, we present a comprehensive quantitative study of retention behavior in modern DRAMs. Using a temperaturecontrolled FPGA-based testing platform, we collect retention time information from 248 commodity DDR3 DRAM chips from five major DRAM vendors. We observe two significant phenomena: data pattern dependence, where the retention time of each DRAM cell is significantly affected by the data stored in other DRAM cells, and variable retention time, where the retention time of some DRAM cells changes unpredictably over time. We discuss possible physical explanations for these phenomena, how their magnitude may be affected by DRAM technology scaling, and their ramifications for DRAM retention time profiling mechanisms.

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Section: Time Between State Changessupporting

confidence: 87%

Section: Implications For Retention Time Profilingmentioning

confidence: 99%

Section: Variable Retention Timementioning

confidence: 99%

See 1 more Smart Citation

An experimental study of data retention behavior in modern DRAM devices

LiuJamie

JaiyenBen

KimYoongu

et al. 2013

SIGARCH Comput. Archit. News

176

403

View full text Add to dashboard Cite

show abstract

“…5,6) Recently, an RTN (RTS)-like fluctuation in gate-induced drain leakage current (GIDL) has been reported. [7][8][9][10][11][12] This RTN-like fluctuation is considered to be the same as the phenomenon that we previously reported, 4,13) because GIDL is a type of reversebiased junction leakage current. 14) From the viewpoints of low standby power and the suppression of erratic operation, it is important to understand the mechanism of the fluctuations in off-state-drain-leakage current.…”

Section: Introductionmentioning

confidence: 79%

Experimental Evidence for Involvement of Interface States in Random Telegraph Noise in Junction Leakage Current of Metal–Oxide–Semiconductor Field-Effect Transistor

Mori

Shima

Takeda

et al. 2012

Jpn. J. Appl. Phys.

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It was experimentally found that an interface state causes variable junction leakage (VJL), namely, random telegraph noise in a reverse-biased junction leakage current which is one result of off-state drain leakage in metal–oxide–semiconductor field-effect transistors (MOSFETs). We prepared deep-submicron-scale MOSFETs of which the defect densities of the Si/SiO2 interface were controlled by the annealing conditions. It was confirmed that the occurrence rate of VJL changes with the density of interface states. Furthermore, it was shown that the mechanism of VJL is similar to that of random telegraph noise (RTN) in drive current.

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Mechanism of random telegraph noise in junction leakage current of metal-oxide-semiconductor field-effect transistor

Mori

Yoshimoto

Takeda

et al. 2012

Journal of Applied Physics

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Evidence is given for the mechanism of hole-trap-related random telegraph noise (RTN) in reverse-biased junction leakage current occurring in the off-state of sub-micron scaled metal-oxide-semiconductor field-effect transistor (MOSFET). It was found that such RTN in junction leakage current, namely, variable junction leakage (VJL), is induced by applying hole-accumulation bias to the gate of the MOSFET. This result indicates that a hole captured in the gate oxide near the silicon surface influences the channel surface potential and causes fluctuation in generation-recombination (g-r) current generated at interface states. The fluctuation in g-r current is observed as VJL. It was also found that occurrence rate of VJL increases under hot-carrier stress. On the basis of these results, a model for VJL that can more concretely explain the mechanism of VJL quantitatively was developed.

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Random Telegraph Signal-Like Fluctuation Created by Fowler–Nordheim Stress in Gate Induced Drain Leakage Current of the Saddle Type Dynamic Random Access Memory Cell Transistor

Cited by 9 publications

References 20 publications

An experimental study of data retention behavior in modern DRAM devices

An experimental study of data retention behavior in modern DRAM devices

Experimental Evidence for Involvement of Interface States in Random Telegraph Noise in Junction Leakage Current of Metal–Oxide–Semiconductor Field-Effect Transistor

Mechanism of random telegraph noise in junction leakage current of metal-oxide-semiconductor field-effect transistor

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