Quasi-Cyclic LDPC Codes: An Algebraic Construction, Rank Analysis, and Codes on Latin Squares

Zhang, Li; Huang, Qin; Lin, Shu; Abdel-Ghaffar, Khaled

doi:10.1109/tcomm.2010.091710.090721

Cited by 111 publications

(102 citation statements)

References 37 publications

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“…We have |G| = 60 and G = ka, bl, where a ¼ (1, 2, 3, 4, 5) and b ¼ (3,4,5). The orders of a and b are 5 and 3, respectively.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…We have |G| = 504 and G = ka, bl, where a = (3,4,5,6,7,8,9) b = (1, 2, 3)(4, 7, 5) (6,9,8) The orders of a and b are 7 and 3, respectively. The (3, 5)-regular GP-LDPC code corresponding to the parity-check matrix H(a, b) has girth 12.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…In this direction, several algebraic constructions for LDPC codes can be found in the literature. From among these constructions we refer to those given in [3][4][5][6][7][8][9][10][13][14][15][16][17][18][19][20][21][22][23][24]. These constructions can be divided into two types.…”

Section: Introductionmentioning

confidence: 99%

“…These constructions can be divided into two types. One type is based on finite geometries ( [3,5,[13][14][15][16][17][18][19]) and another type, which initially proposed by Gallager [6], is based on circulant matrices [4,[6][7][8][9][10][20][21][22][23][24].…”

Section: Introductionmentioning

confidence: 99%

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Approach to the construction of regular low-density parity-check codes from group permutation matrices

Sobhani¹

2012

IET Commun.

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In this study, a new method for constructing low-density parity-check (LDPC) codes is presented. This construction is based on permutation matrices which come from a finite abstract group and hence the codes constructed in this manner are called group permutation low-density parity-check (GP-LDPC) codes. A necessary and sufficient condition under which a GP-LDPC code has a cycle is given and some properties of these codes are investigated. A class of flexible-rate GP-LDPC codes without cycles of length four is also introduced. Simulation results show that GP-LDPC codes perform very well with the iterative decoding and can outperform their random-like counterparts.

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“…We have |G| = 60 and G = ka, bl, where a ¼ (1, 2, 3, 4, 5) and b ¼ (3,4,5). The orders of a and b are 5 and 3, respectively.…”

Section: Simulation Resultsmentioning

confidence: 99%

Section: Simulation Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Approach to the construction of regular low-density parity-check codes from group permutation matrices

Sobhani¹

2012

IET Commun.

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“…Among all LDPC codes, quasi-cyclic (QC) LDPC code [7] is the most promising one for practical application due to its good balance of performance and implementation. Several state-of-art works make contributions to the construction and implementation of QC-LDPC codes for NAND flash [8,9,10], among which Latin square is a well-known algorithm to construct QC-LDPC codes with long code length and high code rate. However, the implementation of QC-LDPC code constructed from Latin square usually suffers from large scale of barrel shifters.…”

Section: Introductionmentioning

confidence: 99%

A low complexity LDPC-BCH concatenated decoder for NAND flash memory

Chen

Sha

Zhang

et al. 2018

IEICE Electron. Express

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Low-density parity-check (LDPC) codes are widely used in NAND flash memory as an advanced error correction method due to their excellent correcting capability. The major challenge is the error floor problem. Dispersed array LDPC (DA-LDPC) code is highly structured and provides implementation convenience due to its regularity. In this paper, it is shown that the constructed (18289, 16384) DA-LDPC code suffers the error floor at BER of 10 −9 , which is far from the demand of flash memory error control. Carefully observing the error patterns in the error floor region, we propose a concatenation of BCH code to alleviate this issue. The error floor has been successfully brought down to BER of 10 −14 by concatenating a BCH code with correcting capability of 14 bits. Compared to the standalone LDPC decoder, the concatenated decoder only consumes 7% extra hardware and the code rate penalty is less than 1%. Meanwhile, hardware implementation has shown that the throughput can achieve 3.52 Gbps with 6 iterations under a clock frequency of 200 MHz.

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Combinatorial Questions: How Can Graph Labelling Help?

Donovan

McCourt

2018

Lecture Notes in Computer Science

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Quasi-Cyclic LDPC Codes: An Algebraic Construction, Rank Analysis, and Codes on Latin Squares

Cited by 111 publications

References 37 publications

Approach to the construction of regular low-density parity-check codes from group permutation matrices

Approach to the construction of regular low-density parity-check codes from group permutation matrices

A low complexity LDPC-BCH concatenated decoder for NAND flash memory

Combinatorial Questions: How Can Graph Labelling Help?

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