DOI: 10.1587/transinf.2017pap0016
View full text | Cite
Sign up to set email alerts

Abstract: SUMMARYCache affinity has been proved to have great impact on the performance of packet processing applications on multi-core platforms. Flow-based packet scheduling can make the best of data cache affinity with flow associated data and context structures. However, little work on packet scheduling algorithms has been conducted when it comes to instruction cache (I-Cache) affinity in modified pipelining (MPL) architecture for multi-core systems. In this paper, we propose a protocol-aware packet scheduling (PAPS… Show more

Help me understand this report

This publication either has no citations yet, or we are still processing them

Set email alert for when this publication receives citations?

See others like this or search for similar articles