Positive gate bias stress-induced hump-effect in elevated-metal metal–oxide thin film transistors

Qi, Dongyu; Zhang, Dongli; Wang, Ming-Xiang

doi:10.1088/1674-1056/26/12/128101

Cited by 11 publications

(7 citation statements)

References 20 publications

(36 reference statements)

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“…However, the mobility of device C decreases to 20.5 cm 2 V −1 s −1 , which should be due to the contribution from the bulk traps in the InGaO layer. In addition, the hump effect and significant negative shifts in V th and V on are also observed in device C . It has been reported that the channel thickness plays a critical role in controlling V th and V on of oxide TFTs .…”

Section: Resultsmentioning

confidence: 81%

High‐Performance Back‐Channel‐Etched Thin‐Film Transistors with an InGaO/InZnO Stacked Channel

Zhao

Zhang

et al. 2020

Physica Status Solidi (a)

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Back‐channel‐etched (BCE) thin‐film transistors (TFTs) with an InGaO/InZnO stacked channel are developed, in which the InGaO and InZnO provide a highly acid‐resistant back channel and a high‐mobility front channel, respectively. The electrical performance of the TFT is optimized by adjusting the InGaO thickness. The best performance is achieved for the TFT with 10 nm thick InGaO. A thinner InGaO layer leads to inferior performance due to damage during the back‐channel‐etching process, while a thicker InGaO layer results in a hump effect and significant negative shifts in the threshold voltage (Vth) and turn‐on voltage (Von), which should be ascribed to the large total carrier number in the channel. The optimal TFT exhibits a high saturated field‐effect mobility of 28.9 cm2 V−1 s−1, a near‐zero Vth of −0.17 V, a Von of −0.49 V, a low subthreshold swing of 0.12 V dec−1, a high on‐to‐off current ratio of 3.5 × 109, and a low contact resistance between the source/drain (S/D) electrodes and channel. The TFT also exhibits high stability under bias thermal stress.

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Section: Resultsmentioning

confidence: 81%

High‐Performance Back‐Channel‐Etched Thin‐Film Transistors with an InGaO/InZnO Stacked Channel

Zhao

Zhang

et al. 2020

Physica Status Solidi (a)

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“…We propose two plausible mechanisms for PBS instability with abnormal behavior after repeated mechanical stress in all directions, as shown in Figure (b). First, the N GD (V o 2+ ) increased by repeated mechanical stress can be gradually drifted into the back channel toward the electric field by positive gate bias to form additional current paths. , It has been reported that additional current paths other than main one (front channel) can degrade in subthreshold regions, such as the hump . Second, when positive gate bias is applied, hydrogen (H + ) may be introduced into mechanically degraded IGZO from Al 2 O 3 G.I.…”

Section: Resultsmentioning

confidence: 99%

Fatigue Effect of Stretchable a-InGaZnO TFT on PI/PDMS Substrate under Repetitive Uni/Biaxial Elongation Stress

Lee

Park

2022

ACS Appl. Electron. Mater.

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We examine the fatigue effects of repeated elongation stress for a fabricated a-IGZO thin-film transistor (TFT) on an island polyimide (PI)/poly(dimethylsiloxane) (PDMS) substrate. The repeated elongation stress evaluation was performed in both a uniaxial direction with 10, 30, and 50% strain and biaxial direction with 10, 20, and 30% strain for 50 000 cycles. The a-IGZO TFTs on the island PI exhibit the following parameters: Vth : −0.91 ± 0.30 V, μ sat : 26.3 ± 0.61 cm2/(V s), and SS: 0.40 ± 0.02 V/decade. As a result of the repeated elongation stress in the maximum evaluated elongation (uniaxis: 50% and biaxis: 30%), the subthreshold swing (SS) increased by about 0.20 V/decade in all directions, and the saturation mobility decreased only in the x-axis direction (Δμ sat : 26.30 → 21.43 cm2/(V s)). Through XPS analysis and TCAD simulation, it was confirmed that SS deteriorated due to an increase of the oxygen-vacancy-related defects (NGA and NGD ) in the IGZO channel layer after repeated elongation stress. The transmission line method (TLM) confirmed that contact resistance increased when stretched only in the x-axis direction. In addition, the positive bias stress (PBS) test showed abnormal behavior including an additional SS-degradation-induced Vth negative shift after repeated elongation stress in all directions. Consequently, the degradation mechanism of both the electrical properties and bias stability for the stretchable a-IGZO TFT was determined after elongation stresses.

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“…Under NBTIS and PBTIS, both H and Vo in IZO can absorb the photon and thermal energy and ionize to electrons, thus exhibiting a more significant negative Vth drift than NBS and PBS. Under PBTIS, the hump appears in the transfer characteristic, which may be caused by the trapping of positively charged ionized oxygen vacancy (Vo 2+ ) at the edge of the channel width direction, which has a stronger electric field, thus generating parasitic transistors [12].…”

Section: Methodsmentioning

confidence: 99%

30.3: Impact of Top Gate Insulator Deposition Temperature on Electrical Performance of Dual‐Gate a‐InZnO TFTs

Huang

Líu

Fan

et al. 2023

Symp Digest of Tech Papers

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The electrical characteristics and stability of dual‐gate amorphous InZnO thin film transistors (a‐IZO TFTs) with top gate insulators (TGIs) deposited under different conditions were investigated. It is found that the TFT with 150°C SiO2 as TGI has higher mobility, while TFT with 300°C SiO2 as TGI has lower off‐state leakage current and better stability under bias stress. Experimental results show that the TFT with stacked TGI deposited at 150°C first and then 300°C can combine the merit of the 150°C SiO2 and 300°C SiO2, achieving high saturation mobility (23.9 cm2/V·s), low off‐state leakage current (10‐14 ~10‐12 A) and also good stability under negative bias stress (NBS) and positive bias stress (PBS) of 3600 s @30 V, with only negative drift of 0.02 V and 0.15 V, respectively. Moreover, it also performs well under negative bias temperature illumination stress (NBTIS) and positive bias temperature illumination stress (PBTIS).

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Positive gate bias stress-induced hump-effect in elevated-metal metal–oxide thin film transistors

Cited by 11 publications

References 20 publications

High‐Performance Back‐Channel‐Etched Thin‐Film Transistors with an InGaO/InZnO Stacked Channel

High‐Performance Back‐Channel‐Etched Thin‐Film Transistors with an InGaO/InZnO Stacked Channel

Fatigue Effect of Stretchable a-InGaZnO TFT on PI/PDMS Substrate under Repetitive Uni/Biaxial Elongation Stress

30.3: Impact of Top Gate Insulator Deposition Temperature on Electrical Performance of Dual‐Gate a‐InZnO TFTs

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