Positive Bias Instability of Bottom-Gate Zinc Oxide Thin-Film Transistors with a SiO_x/SiN_x-Stacked Gate Insulator

Abstract

The positive bias instabilities of the zinc oxide thin-film transistors (ZnO TFTs) with a SiO x /SiN x -stacked gate insulator have been investigated. The film quality of a gate insulator of SiO x , which forms an interface with the ZnO channel, was varied by changing the gas mixture ratio of SiH 4 / N 2 O/N 2 during plasma-enhanced chemical vapor deposition. The positive bias stress endurance of ZnO TFT strongly depended on the deposition condition of the SiO x gate insulator. From the relaxations of the transfer curve shift after imposition of positive bias stress, transfer curves could not be recovered completely without any thermal annealing. A charge trapping in a gate insulator rather than that in bulk ZnO and its interface with a gate insulator is a dominant instability mechanism of ZnO TFTs under positive bias stress. #

ZnO Thin-Film Transistors with SiNx/SiOx Stacked Gate Insulators: Trap Densities and N2O Flow Rate Dependence

“…Hence, is maximized for R N2O ¼ 100 sccm because D t of the tail states is minimized for R N2O ¼ 100 sccm. In contrast to a previous report 17 where the bias stability is superior for R N2O ¼ 100 sccm, this study indicates that D t is minimal for R N2O ¼ 100 sccm. From a production viewpoint, it is preferable that these R N2O are identical.…”

“…17 Here the bottom-gate and topcontact ZnO TFTs are fabricated. First, Cr gate electrodes are deposited and patterned onto glass substrates.…”

“…100 nm thick SiN x gate insulators are deposited using PECVD of the material gases, SiH 4 /NH 3 /N 2 , at 350 C, 60 Pa, and RF power of 50 W. 50 nm thick SiO x gate insulators are sequentially stacked using PECVD of the material gases, SiH 4 /N 2 O/N 2 , at 350 C, 110 Pa, and RF power of 50 W. The mixture ratios of the material gases are SiH 4 /N 2 O/N 2 ¼ 2/ 51/120, 2/100/120, and 2/180/120 sccm; that is, the N 2 O flow rate during SiO x deposition (R N2O ) is the only variable parameter because R N2O greatly influences the transistor parameters and bias stability. 17 However, the etching rate in a buffered hydrofluoric solution and Fourier-transform infrared spectroscopy analysis (FTIR) reveal that SiO x gate insulators do not differ significantly. Next, 40 nm thick ZnO channel layers are deposited using RF magnetron sputtering with a ZnO target in working gases of O 2 /Ar at 150 C, 1 Pa, and a RF power density of 2.3 Wcm À2 .…”

Effects of chemical stoichiometry of channel region on bias instability in ZnO thin-film transistors

“…A linear relationship between the V th shift and the logarithmic stress time without significant changes in the subthreshold swing and field-effect mobility after the stress suggests that the bias instability may be attributed to the negative charge trapping in the gate insulator and/or the channel/dielectric interface as reported in the literatures. [13][14][15] Therefore, the V th shift is nearly independent of the drain bias stresses as shown in Fig. 3͑c͒ since the stress along the lateral direction induced by the drain bias do not enhance charge trapping into the gate insulator.…”

High-Mobility Thin-Film Transistors with Polycrystalline In–Ga–O Channel Fabricated by DC Magnetron Sputtering

“…One may recognize the distinguishing features between the large-grain microcrystalline IGO and small-grain nanocrystalline ZnO for TFT characteristics if these films are used as an active channel layer in the TFT. [14][15][16] A large number of traps exist at the grain boundaries in the nanocrystalline ZnO film. The grain boundary scattering is possibly the dominant mechanism limiting the mobility of ZnO.…”