“…Artificial synapses are primarily configured using either two-terminal memristors − or three-terminal transistors. − ,− However, memristor-based artificial synapses possess shared reading and writing terminals, leading to inevitable destructive weight updates, , and subsequent degradation of operational precision in neuromorphic computing systems. Three-terminal transistor-based artificial synapses, featuring separate writing (gate) and reading (drain) terminals, benefit from a nondestructive weight-update function and have attracted significant academic interest. − ,− The weight updates of these artificial synapses have been modulated using various charge-storage mechanisms, such as interfacial traps, ,− floating gates, , ferroelectric polarization switching, , ion intercalation, , and defects in dielectrics. , Artificial synapses are essential components of artificial neural networks (ANNs), and their high-precision computation relies on high-density conductance states stemming from the wide hysteresis window of three-terminal transistors. Consequently, optimizing device engineering to enhance the wide hysteresis window of three-terminal transistors has significant implications for the development of ANN-based neuromorphic computation systems.…”