Polarity-dependent oxide breakdown of NFET devices for ultra-thin gate oxide

Wu, Ernest Y.; Lai, W.; Khare, Mukesh; Suñé, J.; Han, Liang; McKenna, J.; Bolam, R.; Harmon, D.; Strong, A.

doi:10.1109/relphy.2002.996611

Cited by 17 publications

(4 citation statements)

References 52 publications

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“…TDDB models for hyperthin (<4.0nm) SiON films have transitioned from field-based models (E or 1/E ) to a gatevoltage V G model [8,9] with a power-law dependence observed:…”

Section: Impact Of Scaling On Gate-oxide Reliabilitymentioning

confidence: 99%

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Reliability Trends with Advanced CMOS Scaling and The Implications for Design

McPherson

2007

2007 IEEE Custom Integrated Circuits Conference

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Scaling (for enhanced performance, increased functionality and cost reduction reasons) has pushed existing CMOS materials much closer to their intrinsic reliability limits. This will require that designers pay very close attention to both front-end-of-line (FEOL) and back-end-of-line (BEOL) reliability issues. As for the FEOL reliability issues, hyperthin gate oxide leakage, time-dependent dielectric breakdown (TDDB), and negative-bias temperature instability (NBTI) are near the top the list. In the case of hyper-thin gate oxides, TDDB can manifest itself in terms of multiple soft-breakdown events thus causing an unwanted rise in leakage; NBTI-induced p-channel device degradation tends to have a significant impact on minimum-voltage circuit operation. As for the important BEOL reliability issues, the top ones are: electromigration (EM), stress migration (SM), low-k dielectric TDDB, and mechanical weaknesses associated with the low-k films and their interfaces. The EM associated with Cu interconnects will continue to worsen with scaling due to increased interface effects; SM will require even fewer vacancies to coalesce which can cause an unwanted via resistance rise; and, relatively poor low-k TDDB behavior and low-k mechanical-weakness issues may require special interconnect layout considerations.

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“…TDDB models for hyperthin (<4.0nm) SiON films have transitioned from field-based models (E or 1/E ) to a gatevoltage V G model [8,9] with a power-law dependence observed:…”

Section: Impact Of Scaling On Gate-oxide Reliabilitymentioning

confidence: 99%

“…[ Refs. 8,9] If the high gate leakage cannot be tolerated, e.g., portable designs where battery lifetime is a design priority, then high-k gate dielectrics may be needed. Shown in Fig.…”

Section: Impact Of Scaling On Gate-oxide Reliabilitymentioning

confidence: 99%

Reliability Trends with Advanced CMOS Scaling and The Implications for Design

McPherson

2007

2007 IEEE Custom Integrated Circuits Conference

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“…A thicker oxide (3 nm) should be used to guarantee a gateoxide lifetime of more than 10 years. 6) This is possible because BJT-mode operation does not require a very thin gate oxide. 7) Figure 3 shows BTBT contour maps for a BJT-mode cell in the Hold 1 and Hold 0 states.…”

Section: Mechanism Of Data Retention Failurementioning

confidence: 99%

Design Optimization of Back-Gated Thin-Body Silicon-on-Insulator Capacitorless Dynamic Random Access Memory Cell

Cho¹,

Shin²,

Liu³

2012

Jpn. J. Appl. Phys.

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Highly scaled (22 nm-node) capacitorless single-transistor dynamic random access memory (DRAM) cell design is investigated via technology computer-aided design (TCAD) simulations. It is found that the gate-sidewall spacer width and operating voltages can be adjusted to reduce band-to-band tunneling (BTBT) and thereby increase data retention time for bipolar junction transistor (BJT)-based operation. Read current variations due to random dopant fluctuations (RDF) are investigated via three-dimensional Kinetic Monte Carlo (KMC) simulations. It is found that BJT-based operation is more robust to RDF effects than metal–oxide–semiconductor field-effect transistor (MOSFET)-based operation.

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“…Generally for MOSFET applications, the TDDB focus has been on very thin films (10-100 Å) [Refs. [1][2] whereas, for low-k interconnect dielectrics, the thicknesses of interest are on the order of 1000Å [Ref. 3].…”

Section: Introductionmentioning

confidence: 99%

TDDB evaluations and modeling of very high-voltage (10kV) capacitors

Higgins

2009

2009 IEEE International Reliability Physics Symposium

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Time-Dependent Dielectric Breakdown (TDDB) data for very thick (8um) silica-based dielectrics is reported at relatively low fields (< 5MV/cm) but at extremely high voltages (up to 4000V). TDDB data was taken across a wide range of dielectric thicknesses ranging from 38Å to 8μm (80,000Å). Consistent with the TDDB results generally reported for thin films, a thickness-independent effective dipole moment of ~13eÅ was concluded from the testing data. TDDB data is also presented for stacked dielectrics structures (Nitride/Silica) which tend to show a strong polarity dependence, depending on whether electron injection is into the nitride or oxide layer. While the time to failure is polarity dependent, the effective dipole moment is independent of polarity. [

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Polarity-dependent oxide breakdown of NFET devices for ultra-thin gate oxide

Cited by 17 publications

References 52 publications

Reliability Trends with Advanced CMOS Scaling and The Implications for Design

Reliability Trends with Advanced CMOS Scaling and The Implications for Design

Design Optimization of Back-Gated Thin-Body Silicon-on-Insulator Capacitorless Dynamic Random Access Memory Cell

TDDB evaluations and modeling of very high-voltage (10kV) capacitors

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