Placement with symmetry constraints for analog layout using red-black trees

Abstract

-The traditional way of approaching placement problems in computer-aided design (CAD) tools for analog layout is to explore an extremely large search space of feasible or unfeasible placement configurations, where the cells are moved in the chip plane (being even allowed to overlap) by a stochastic optimizer [2,6]. This paper presents a novel analog placement technique operating on the set of tree representations of the layout [4], where the typical presence of an arbitrary number of symmetry groups of devices is directly taken into account during the exploration of the solution space. The computation times exhibited by this novel approach are typically 3 -6 times better than those of the algorithms using the traditional exploration strategy. This superior efficiency is due to the use of red-black trees, a data structure introduced by Guibas and Sedgewick [3] to support operations on dynamic sets of intervals.

Automatic placement of identical unit capacitors to improve capacitance matching

“…Since both methods dealt with unit capacitors with different sizes, the main concern was finding the most compact layout, by minimizing the empty spaces between unit capacitors. This was also the objective in [12], [14], [17], [20] and [21], which dealt with the placement of generic analog blocks, with arbitrary shapes and sizes, using common-centroid geometry. The requirement of a compact layout to save die area, and the fact that the unit capacitors do not have the same size, add a lot of complexity to the placement problem.…”