2009 IEEE International Electron Devices Meeting (IEDM) 2009
DOI: 10.1109/iedm.2009.5424413
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Phase Change Memory technology for embedded non volatile memory applications for 90nm and beyond

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Cited by 40 publications
(18 citation statements)
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“…The storage element is MOS-selected ( Fig. 1), being this architecture the most cost effective solution for embedded applications [3]. The resulting cell area is competitive for the multi-Mb array target of embedded products, and no additional masks are needed for the integration of the select transistor.…”
Section: Methodsmentioning
confidence: 99%
“…The storage element is MOS-selected ( Fig. 1), being this architecture the most cost effective solution for embedded applications [3]. The resulting cell area is competitive for the multi-Mb array target of embedded products, and no additional masks are needed for the integration of the select transistor.…”
Section: Methodsmentioning
confidence: 99%
“…The ability for PCRAM to replace Nor flash at the 90 nm node has already been verified, [213] and an 8 Gb PCRAM at the 20 nm node has recently been released, [214] which is comparable to the state-of-the-art NOR flash technology (8 Gb at 45 nm). Moreover, the scalability of PCRAM device to <5 nm has recently been demonstrated using carbon nanotubes as electrodes, [215,216] and a cycling endurance of 10 11 was also reported.…”
Section: Other Miscellaneous Pcram Cellsmentioning
confidence: 99%
“…All characterizations are performed using this test structure. A wall-type PCM structure [29] is connected in series with a MOSFET selector, where the gate is used to limit the current flowing through the cell. ua is the radius of the active volume, where phase transitions are located.…”
Section: Electrical Characterization Methodsmentioning
confidence: 99%