Phase-change materials for non-volatile memory devices: from technological challenges to materials science issues

Abstract

Chalcogenide phase-change materials (PCMs), such as Ge-Sb-Te alloys, have shown outstanding properties, which has led to their successful use for a long time in optical memories (DVDs) and, recently, in non-volatile resistive memories. The latter, known as PCM memories or phase-change random access memories (PCRAMs), are the most promising candidates among emerging non-volatile memory (NVM) technologies to replace the current FLASH memories at CMOS technology nodes under 28 nm. Chalcogenide PCMs exhibit fast and reversible phase transformations between crystalline and amorphous states with very different transport and optical properties leading to a unique set of features for PCRAMs, such as fast programming, good cyclability, high scalability, multi-level storage capability, and good data retention. Nevertheless, PCM memory technology has to overcome several challenges to definitively invade the NVM market. In this review paper, we examine the main technological challenges that PCM memory technology must face and we illustrate how new memory architecture, innovative deposition methods, and PCM composition optimization can contribute to further improvements of this technology. In particular, we examine how to lower the programming currents and increase data retention. Scaling down PCM memories for large-scale integration means the incorporation of the PCM into more and more confined structures and raises materials science issues in order to understand interface and size effects on crystallization. Other materials science issues are related to the stability and ageing of the amorphous state of PCMs. The stability of the amorphous phase, which determines data retention in memory devices, can be increased by doping the PCM. Ageing of the amorphous phase leads to a large increase of the resistivity with time (resistance drift), which has up to now hindered the development of ultra-high multi-level storage devices. A review of the current understanding of all these issues is provided from a materials science point of view.

Phase‐Change Superlattice Materials toward Low Power Consumption and High Density Data Storage: Microscopic Picture, Working Principles, and Optimization

“…For example, Simpson et al, Takaura et al, Ohyanagi and Takaura, and Saito et al reported a series of GST‐SLs with 4 nm Sb 2 Te 3 sublayers, Tominaga et al reported some GST‐SLs with 1 nm Sb 2 Te 3 sublayer, Momand et al and Casarin et al reported some GST‐SLs with 3 nm Sb 2 Te 3 sublayers, Wang et al reported a GST‐SL with 6 nm Sb 2 Te 3 sublayers. Moreover, Kalikka et al and Noé et al fabricated a series of GST‐SLs with thickness‐varied Sb 2 Te 3 sublayers (varied from 1 to 8 nm). Also, Zhou et al reported a series of GST‐SLs with thickness‐varied Sb 2 Te 1 sublayers (varied from 1 to 4 nm).…”

“…Moreover, the endurance of the N‐doped superlattice can reach 10 8 cycles, which is better than 10 6 cycles of GST‐SL (Figure o). Since many elements (such as C, N, O, Si, Ag, W, Bi, Sn) have been demonstrated to improve the performance of conventional bulk GST, similar attempts in GST‐SL should be expected.…”

“…One direction is to find materials alternative to GST. For example, during the past decades, there emerged several new material candidates for low power consumption including the SiSbTe alloy, the GeCuTe alloy, the GeSb alloy, the TiSbTe alloy, the ScSbTe alloy, the C‐doped GST alloy, the C‐doped GeTe alloy, the N‐doped GST alloy, the N‐incorporated GeTe alloy, the O‐doped GST alloy, and so on …”

Impact of Stoichiometry on the Structure of van der Waals Layered GeTe/Sb2Te3 Superlattices Used in Interfacial Phase‐Change Memory (iPCM) Devices

“…Reducing the power consumption, in particular the RESET current, is required for low power devices at CMOS technology nodes below 28 nm. Increasing the geometrical and thermal confinement of the phase‐change material in so‐called confined memory cells allows to improve the heating efficiency during the current pulses . Besides, many research efforts aim at optimizing the phase change material.…”

“…Increasing the geometrical and thermal confinement of the phase-change material in so-called confined memory cells allows to improve the heating efficiency during the current pulses. [4] Besides, many research efforts aim at optimizing the phase change material. Currently, a promising material engineering approach consists in introducing a chalcogenide superlattice (SL) in a memory cell, as first shown by Simpson et al [5] The SL is designed as a periodic stacking of nm-thick GeTe and van der Waals (vdW) Sb 2 Te 3 crystalline layers.…”