Performance-driven placement for design of rotation and right arithmetic shifters in monolithic 3D ICs

Zhuang, Hao; Lu, Jingwei; Samadi, Kambiz; Du, Yi; Cheng, Chung‐Kuan

doi:10.1109/icccas.2013.6765395

Cited by 5 publications

(4 citation statements)

References 15 publications

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“…Placement plays an important role in the VLSI physical design automation [Kahng et al 2010;Lu 2010] for both random logic ] and datapath-intensive components [Zhuang et al 2013]. Placement performance largely impacts the downstream stages of power grid design [Wang et al 2013], clock tree synthesis [Lu et al 2012a], power optimization [Lu et al 2012b], global detail routing [Lu and Sham 2013], postlayout simulation [He et al 2012], and design variability [Zheng et al 2014].…”

Section: Introductionmentioning

confidence: 99%

ePlace

Chen

Chang

et al. 2015

ACM Trans. Des. Autom. Electron. Syst.

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We develop a flat, analytic, and nonlinear placement algorithm, ePlace, which is more effective, generalized, simpler, and faster than previous works. Based on the analogy between placement instance and electrostatic system, we develop a novel placement density function eDensity, which models every object as positive charge and the density cost as the potential energy of the electrostatic system. The electric potential and field distribution are coupled with density using a well-defined Poisson's equation, which is numerically solved by spectral methods based on fast Fourier transform (FFT). Instead of using the conjugate gradient (CG) nonlinear solver in previous placers, we propose to use Nesterov's method which achieves faster convergence. The efficiency bottleneck on line search is resolved by predicting the steplength using a closed-form equation of Lipschitz constant. The placement performance is validated through experiments on the ISPD 2005 and ISPD 2006 benchmark suites, where ePlace outperforms all state-of-the-art placers (Capo10.5, FastPlace3.0, RQL, MAPLE, ComPLx, BonnPlace, POLAR, APlace3, NTUPlace3, mPL6) with much shorter wirelength and shorter or comparable runtime. On average, of all the ISPD 2005 benchmarks, ePlace outperforms the leading placer BonnPlace with 2.83% shorter wirelength and runs 3.05× faster; and on average, of all the ISPD 2006 benchmarks, ePlace outperforms the leading placer MAPLE with 4.59% shorter wirelength and runs 2.84× faster. . 2015. ePlace: Electrostatics-based placement using fast fourier transform and nesterov's method.

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Section: Introductionmentioning

confidence: 99%

ePlace

Chen

Chang

et al. 2015

ACM Trans. Des. Autom. Electron. Syst.

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“…Placement remains dominant on the overall quality of physical design automation [29,30]. Based on logic synthesis [31], back-end design on timing [45], power [9,44], routability [8,38], variability [3,42] etc. are highly impacted by placement performance.…”

Section: Introductionmentioning

confidence: 99%

ePlace-3D

Zhuang

Kang

et al. 2016

Proceedings of the 2016 on International Symposium on Physical Design

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We propose a flat, analytic, mixed-size placement algorithm ePlace-3D for three-dimension integrated circuits (3D-ICs) using nonlinear optimization. Our contributions are (1) electrostatics based 3D density function with globally uniform smoothness (2) 3D numerical solution with improved spectral formulation (3) 3D nonlinear pre-conditioner for convergence acceleration (4) interleaved 2D-3D placement for efficiency enhancement. Our placer outperforms the leading work mPL6-3D and NTUplace3-3D with 6.44% and 37.15% shorter wirelength, 9.11% and 10.27% fewer 3D vertical interconnects (VI) on average of IBM-PLACE circuits. Validation on the large-scale modern mixed-size (MMS) 3D circuits shows high performance and scalability.

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“…Lowering supply voltages, increasing current densities as well as tight design margins demand more accurate large-scale PDN simulation. Advanced technologies [15], [16], three dimensional (3D) IC structures [17]- [19], and increasing complexities of system designs all make VLSI PDNs extremely huge and the simulation tasks time-consuming and computationally challenging. Due to the enormous size of modern designs and long simulation runtime of many cycles, instead of general nonlinear circuit simulation [20], [21], PDN is often modeled as a large-scale linear circuit with voltage supplies and time-varying current sources [22]- [24].…”

Section: Introductionmentioning

confidence: 99%

Simulation Algorithms With Exponential Integration for Time-Domain Analysis of Large-Scale Power Delivery Networks

Zhuang

Weng

et al. 2016

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-We design an algorithmic framework using matrix exponentials for time-domain simulation of power delivery network (PDN). Our framework can reuse factorized matrices to simulate the large-scale linear PDN system with variable stepsizes. In contrast, current conventional PDN simulation solvers have to use fixed step-size approach in order to reuse factorized matrices generated by the expensive matrix decomposition. Based on the proposed exponential integration framework, we design a PDN solver R-MATEX with the flexible time-stepping capability. The key operation of matrix exponential and vector product (MEVP) is computed by the rational Krylov subspace method.To further improve the runtime, we also propose a distributed computing framework DR-MATEX. DR-MATEX reduces Krylov subspace generations caused by frequent breakpoints from a large number of current sources during simulation. By virtue of the superposition property of linear system and scaling invariance property of Krylov subspace, DR-MATEX can divide the whole simulation task into subtasks based on the alignments of breakpoints among those sources. The subtasks are processed in parallel at different computing nodes without any communication during the computation of transient simulation. The final result is obtained by summing up the partial results among all the computing nodes after they finish the assigned subtasks. Therefore, our computation model belongs to the category known as Embarrassingly Parallel model.Experimental results show R-MATEX and DR-MATEX can achieve up to around 14.4× and 98.0× runtime speedups over traditional trapezoidal integration based solver with fixed timestep approach.

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Performance-driven placement for design of rotation and right arithmetic shifters in monolithic 3D ICs

Cited by 5 publications

References 15 publications

ePlace

ePlace

ePlace-3D

Simulation Algorithms With Exponential Integration for Time-Domain Analysis of Large-Scale Power Delivery Networks

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