Novel Double-Gate 1T-DRAM Cell Using Nonvolatile Memory Functionality for High-Performance and Highly Scalable Embedded DRAMs

Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates

“…Since the device has initial state, this refresh pulse only needs to be applied l 50 ns applied to redistribute charge in the fresh device. his refresh returns the device back to the charged s volatile cycle continues, requiring a refresh period of ab ed state, and thus demonstrating the dynamic mode of 221 tage the sing The two two g. 5. d to (2). the mV h is not for .…”

“…Such a unified memory device could store both volatile (dynamic) and nonvolatile states simultaneously. This could have a dramatic impact on traditional memory hierarchies [2][3][4]. For example, the data stored in the nonvolatile mode of the device when the computer is powered down could quickly be written to the dynamic state when the power is turned on, allowing for instant-on computing.…”

Investigation of Junction-less Tunneling Field Effect Transistor (JL-TFET) with Floating Gate

“…The effect of floating body has been investigated and applied in the proposed device. A floating body can be used effectively as a storage node in MOS devices [11]. The stored electron charges in the floating body ensures a fully depleted region and can have more holes than doping concentration in the region below it [11] ) Sichannel, with source/drain extension lengths of 20 nm.…”

“…A floating body can be used effectively as a storage node in MOS devices [11]. The stored electron charges in the floating body ensures a fully depleted region and can have more holes than doping concentration in the region below it [11] ) Sichannel, with source/drain extension lengths of 20 nm. Silicon film thickness is 5 nm, gate oxide thickness is 2 nm, isolation oxide layer is 5 nm and polysilicon FG thickness is 2 nm respectively.…”

A novel double floating-gate unified memory device

“…A device that could simultaneously store both volatile (dynamic) and nonvolatile states could have a tremendous impact on the traditional memory architecture [1][2][3]. Such a unified memory device would permit instant-on computing, could enable fast in-situ checkpointing for rollback/recovery leading to improved resiliency, and could be used to actively control partial hibernation leading to energy-proportional computing.…”