Nonsmooth Current-Constrained Control for a DC–DC Synchronous Buck Converter with Disturbances via Finite-Time-Convergent Extended State Observers

Abstract

This study investigates the problem of overlarge current protection for a DC–DC synchronous buck converter with the existence of uncertainties and disturbances. Aiming to deal with the hardware damage in the electric circuit of a DC–DC buck that may be caused by overlarge transient current, a new nonsmooth current-constrained control (NCC) algorithm is proposed to replace the traditional ones, which use conservative coefficients to satisfy current constraint, leading to a sacrifice of dynamic performance. Based on the homogeneous system technique, a nonsmooth state feedback controller is improved by adding a penalty term that prompts the adaptive gain of the controller according to the inductor current and current constraint. Then by using two finite-time extended state observers (FTESO), the unmatched disturbances and matched disturbances can be compensated to enhance the robustness of the DC–DC synchronous buck converter. The effect of proposed scheme has been verified by experimental results.

Novel Design Methodology for DC-DC Converters Applying Metaheuristic Optimization for Inductance Selection

“…In other words, the current overshoot should be kept small in magnitude and with a non-aggressive slope, regarding to the properties of the ITAE performance index (as explained in [18]). Therefore, the shown profiles from Figures 3 and 4 ensure the fastest voltage response with a low current slope, which is the best behavior to be obtained from the design, as discussed in [4].…”

“…Thus, it is necessary to select the correct inductance and capacitance values, as explained in [2,3]. Yet, the higher and higher required response speed in DC-DC converters (as explored in [4]), lead to large overshoots in the inductance current at the initial state. Hence, Ref.…”

“…Hence, Ref. [4] explains that the issue can be dealt through current limiter hardware elements, which adds cost to the converter implementation and adds parasitic elements that may reduce the efficiency of the circuit.…”

“…As cost function for the optimization, the Integral of Time Multiplied by Absolute Error (ITAE) performance index is taken as inspiration; where, as explained in [18] and validated in [15], the performance index may lead to small overshoots with damped oscillations profiles, which is exactly what the optimization is looking for. In terms of the current behavior of the circuit, a dampened profile is expected, in order to avoid the undesired large current overshoots, without neglecting the speed with which the converter voltage is expected to respond, which enables better and more efficient designs, as explained in [4].…”

“…Moreover, since a fast voltage response is a priority for DC-DC converters design (as discussed in [4]), the ITAE allows an optimization that prioritizes the convergence and velocity of the converter, ensuring that the last errors will be weighted with greater importance.…”