No. 1 ESS Switching Network Frames and Circuits

Danielsen, D.; Dunlap, K. S.; Hofmann, Hubert

doi:10.1002/j.1538-7305.1964.tb04124.x

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Basle Feature*2

Output Circuitry1

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1964

1976

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Cited by 10 publications

(3 citation statements)

References 5 publications

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“…1 •' The figure shows the reed contacts and two pairs of differently wound windings. One pair is associated with a vertical control path and the second pair is part of the horizontal control path.…”

Section: Basle Feature*mentioning

confidence: 99%

See 1 more Smart Citation

Remreed Switching Networks for No. 1 and No. 1A ESS: Remreed Network Electronic Control

Danielsen¹,

Liss²

1976

Bell System Technical Journal

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Section: Basle Feature*mentioning

confidence: 99%

“…These are the 2:1 line-switching circuit which uses 12A concentrator grids, the 4:1 line-switching circuit which uses 13A concentrator grids, and the trunk-and junctor-switching circuits that use IIA and 10A grids, respectively. 1 These four circuits are all different in size and organization, but basic control functions are common.…”

Section: Basle Feature*mentioning

confidence: 99%

Remreed Switching Networks for No. 1 and No. 1A ESS: Remreed Network Electronic Control

Danielsen¹,

Liss²

1976

Bell System Technical Journal

Self Cite

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“…If the control windings of an interrogated ferrod have less than the nonoperate value of current, the ferrod output is detected and transmitted as a pulse (1). The output of an interrogated ferrod whose control windings have more than the operate value of current is detected and transmitted as a O.…”

Section: Output Circuitrymentioning

confidence: 99%

No. 1 ESS Scanner, Signal Distributor, and Central Pulse Distributor

Freimanis¹,

Guercio²,

May³

1964

Bell System Technical Journal

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Organization of No. 1 ESS Central Processor

Harr¹,

Taylor²,

Ulrich³

1964

Bell System Technical Journal

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The central processor controls the operation of the No. 1 electronic switching system by executing sequences of program instructions. The logical organization of the central processor is described by the simultaneous evolution of: (1) an instruction repertoire to carry out the required telephone and system maintenance tasks efficiently, and (2) a circuit logic design to provide the necessary circuits (flip‐flop registers, accumulators, etc.) to execute the instructions at a high data processing rate. The design aims, order structure, timing, internal sequencing, and communications with the peripheral equipment of the system are described.

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No. 1 ESS Switching Network Frames and Circuits

Cited by 10 publications

References 5 publications

Remreed Switching Networks for No. 1 and No. 1A ESS: Remreed Network Electronic Control

Remreed Switching Networks for No. 1 and No. 1A ESS: Remreed Network Electronic Control

No. 1 ESS Scanner, Signal Distributor, and Central Pulse Distributor

Organization of No. 1 ESS Central Processor

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