Proceedings of the 8th International Symposium on System Synthesis - ISSS '95 1995
DOI: 10.1145/224486.224489
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Multiple-process behavioral synthesis for mixed hardware-software systems

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Cited by 21 publications
(12 citation statements)
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“…the semantics of a node. There have been works on low granularity, where a node represents a single instruction or a short sequence of instructions [6,8,40,21], middle granularity, where a node represents a basic block [22,27,38], and high granularity, where a node represents a function or procedure [18,36,48,2], as well as flexible granularity, where a node can represent any of the above [20,47].…”
Section: Previous Workmentioning
confidence: 99%
See 1 more Smart Citation
“…the semantics of a node. There have been works on low granularity, where a node represents a single instruction or a short sequence of instructions [6,8,40,21], middle granularity, where a node represents a basic block [22,27,38], and high granularity, where a node represents a function or procedure [18,36,48,2], as well as flexible granularity, where a node can represent any of the above [20,47].…”
Section: Previous Workmentioning
confidence: 99%
“…an assignment of values to the variables. 2 The internal nodes of the search tree correspond to partial solutions, i.e. assignment of values to some of the variables.…”
Section: Branch-and-bound Frameworkmentioning
confidence: 99%
“…Co-design may also include integrated synthesis of hardware and software components, which we refer to as hardware/software cosynthesis [6] [7] [8] [9] [10]. Automated hardware/software co-synthesis may allow the designer to explore more of the design space by dynamically reconfiguring the hardware and software to find the best overall organization as the design evolves.…”
Section: Hardware/software Co-synthesismentioning
confidence: 99%
“…The solution space for SOC design generally consists of a single processor core and a good deal of hardware implementation possibilities for each function block [6]- [17]. Therefore, a significant part of the component selection sub-problem is devoted to find out the optimal implementation of each hardware function block under design constraints such as execution speed, cost, and power consumption.…”
Section: Partitioning Algorithms : Past and Presentmentioning
confidence: 99%
“…Since our taxonomy does not distinguish the detailed target architecture, we summarize the range of solution space as follows: (1) fixed architecture [4], [14]- [17] and (2) synthesizable architecture. Architecture synthesis consists of the following three sub-problems: (1) component selection [6]- [13], [21]- [24], (2) interface synthesis [21]- [24], (3) memory structure synthesis [28].…”
Section: Partitioning Algorithms : Past and Presentmentioning
confidence: 99%