Monolithic 3D integration: A powerful alternative to classical 2D scaling

Abstract

Monolithic or sequential 3D Integration is a powerful technological enabler for actual 3D IC design as the stacked layers can be connected at the transistor scale. This paper reviews the opportunities brought by M3DI and highlights the applications benefiting from this small 3D contact pitch. It also presents the technological challenges of this concept and offers a general overview of the potential solutions to obtain a high performance low temperature top transistor while keeping bottom MOSFET integrity.

Intermetallic compounds in 3D integrated circuits technology: a brief review

“…Correlated to EM, thermomigration (TM) is a phenomenon that involves heat generation and dissipation over numerous chips stacked in 3D ICs. TM explains the atomic diffusion from high-temperature to low-temperature regions, which can cause atom migration problems in solder microbumps structures [ 3,110,113,114 ]. The temperature gradient exists since the microbumps undergo thermal compression bonding and reflow as a function of different thermal conductivities of the substrate, chips and solder [ 115 ].…”

“…The accessible manufacturing approaches of 3D ICs by different design methods may have led to the integration of more electronic functionalities at shorter interconnect lengths [ 3–5 ]. At the recent manufacturing level, 3D ICs consist of several layers of interconnected chips that are built on top of the Si chips.…”

Testing of Interposer-Based 2.5D Integrated Circuits

“…In order to fully exploit the potential of 3D integration, monolithic 3D (M3D) technology is being advocated as an alternative to TSV-based 3D ICs [103]. A crosssectional view of a monolithic 3D IC is shown in Figure 8.1.…”

Electrical Coupling and Simulation of Monolithic 3D Logic Circuits and Static Random Access Memory

“…Although M3DI is limited to 2 h at 500 °C for performance stability of the bottom fully-depleted silicon-on insulator (FDSOI), it is possible to manufacture the M3DI without any degradation of performance through the research and development of the low-temperature process [8,9]. Recently, studies of 3D heterogeneous integration (e.g., complementary metal-oxide-semiconductor (CMOS) with nanoelectromechanical systems (NEMS), optical devices, or memory) that has been composed of CMOS and sensors or memory as a single stack have been reported [10,11,12]. In order to use M3DI in logic circuits, it is necessary to investigate electrical coupling between stacked and diagonally-stacked devices with inter-layer dielectric (ILD) and to enable circuit simulation considering electrical coupling.…”