Abstract A prototype vision chip has been designed that incorporates a 20 9 64 array of processing elements on a 31 lm pitch. Each processor element includes 14 bits of digital memory in addition to seven analogue registers. Digital operands include NOR and NOT with operations of diffusion, subtraction, inversion and squaring available in the analogue domain. The cells of the array can be configured as an asynchronous propagation network allowing operations such as flood filling to occur with times of *1 ls a…
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