2002
DOI: 10.1109/ted.2002.802617
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Metal nanocrystal memories. I. Device design and fabrication

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Cited by 480 publications
(412 citation statements)
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“…Normally a high temperature annealing process is applied to make gold nanoparticles. In this case, a thin gold layer can be converted to the gold nanoparticles due to the minimization of the surface energy [37]. By adopting this method, gold nanoparticle-based non-volatile memory devices can be fabricated.…”
Section: Operations Of Non-volatile Memory Devicesmentioning
confidence: 99%
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“…Normally a high temperature annealing process is applied to make gold nanoparticles. In this case, a thin gold layer can be converted to the gold nanoparticles due to the minimization of the surface energy [37]. By adopting this method, gold nanoparticle-based non-volatile memory devices can be fabricated.…”
Section: Operations Of Non-volatile Memory Devicesmentioning
confidence: 99%
“…However, floating-gate based flash memory has been reported to have limits in continuous device scaling due to increasing cell-to-cell interference, decreasing coupling ratio, non-scalable tunnelling oxide thickness, decreasing tolerance for charge loss, etc. Therefore, active research has been performed on flash memory devices with discrete charge trapping layers, such as silicon-oxide-nitride-oxide-silicon (SONOS) devices [29][30][31][32][33]25] or nanocrystal (NC)-based memory devices (nano-floating gate memory devices) [34][35][36][37][38]. Because of their better endurance, smaller chip size, and lower power consumption when compared with floating-gate devices, this technology is of great interest to the electronics industry.…”
Section: Introductionmentioning
confidence: 99%
“…T he ability to control and manipulate metal inclusions (for example, individual metal clusters) inside a solid-state medium will greatly expand the functions and create new classes of materials (for example, metamaterials) and devices for electronic, magnetic, photonic, chemical and optoelectronic applications [1][2][3][4][5][6] . Such abilities have been demonstrated, for example, with scanning tunneling microscopy tools 1 .…”
mentioning
confidence: 99%
“…9 Compared with ferroelectric polymer-based memory, devices using metal NPs as charge traps have an advantage that the trap density and distribution can be controlled by adjusting the density and location of the NPs during the NP formation process, by using ultrathin metallic films deposition or ion implantation techniques. 10,11 Recently, we reported a different structure of transistor memory device with remarkable memory window performance by placing silver NPs in between two pentacene layers. 12 A significant advantage of the structure is that it can eliminate the extra fabrication steps for the insulator layers as in the case of floating gate transistor memory structure, making it suitable for integrating with other electronic devices on the same substrate to form a circuit.…”
mentioning
confidence: 99%