MeNTT: A Compact and Efficient Processing-in-Memory Number Theoretic Transform (NTT) Accelerator

Li, Dai; Akhil, Pakala,; Yang, Kaiyuan

doi:10.1109/tvlsi.2022.3151321

Cited by 14 publications

(8 citation statements)

References 21 publications

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“…Computing twiddle factors on-chip has been explored [33,35,62] and applied in industry [90]. In-memory FFT accelerators have also been proposed to reduce this communication overhead [36,81,138] along with 3D-stacked memory accelerators [60].…”

Section: Fft Acceleratorsmentioning

confidence: 99%

Bind the gap: compiling real software to hardware FFT accelerators

Woodruff

Armengol-Estapé

Ainsworth

et al. 2022

Proceedings of the 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation

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Specialized hardware accelerators continue to be a source of performance improvement. However, such specialization comes at a programming price. The fundamental issue is that of a mismatch between the diversity of user code and the functionality of fixed hardware, limiting its wider uptake.Here we focus on a particular set of accelerators: those for Fast Fourier Transforms. We present FACC (Fourier ACcelerator Compiler), a novel approach to automatically map legacy code to Fourier Transform accelerators. It automatically generates drop-in replacement adapters using Input-Output (IO)-based program synthesis that bridge the gap between user code and accelerators. We apply FACC to unmodified GitHub C programs of varying complexity and compare against two existing approaches. We target FACC to a high-performance library, FFTW, and two hardware accelerators, the NXP PowerQuad and the Analog Devices FFTA, and demonstrate mean speedups of 9x, 17x and 27x respectively.

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Section: Fft Acceleratorsmentioning

confidence: 99%

Bind the gap: compiling real software to hardware FFT accelerators

Woodruff

Armengol-Estapé

Ainsworth

et al. 2022

Proceedings of the 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation

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“…Recently, NTT accelerators based on CIM systems have also been attempted. Bit-serial modular addition, subtraction, and multiplication using 6T-SRAM arrays and near memory logic circuits are implemented in [17]. A bit-serial comparator attached at each column compares the temporal result with 𝑞 to fit the result into the 𝑞 limit.…”

Section: Related Workmentioning

confidence: 99%

“…Since the twiddle factor matrix of NTT is constant for a given parameter (𝑛, 𝑞) regardless of inputs, this approach avoids constant RRAM writes and implements parallel MAC operations through Kirchhoff's current law with the applied input pulses. Unlike the FFT-like algorithm-based CIM designs [14], [17], which need to program the current stage outputs to the memory arrays for the next stage operations, VMM approach enables RM-NTT to process NTT without programming the intermediate values in the RRAM arrays.…”

Section: B Twiddle Factor Matrix Mappingmentioning

confidence: 99%

“…RM-NTT shows 64 faster latency and 7.4 better energy efficiency than [14] for (1024, 16) parameter, showing that VMM operations with constant RRAM arrays are more suitable for the RRAM-based CIM NTT acceleration. Compared with the SRAM-based CIM design employed in [17], RM-NTT shows 26 faster latency and 1.6 larger energy consumption for (1024, 14) parameter. Although the FFT-like designs in the CIM platforms can operate all butterflies in parallel during each stage, the log 2 𝑛 stages need to be executed in series, leading to slower latency than the VMM approach.…”

Section: B Comparison With Other Cim Platformsmentioning

confidence: 99%

“…Therefore, CIM can eliminate the frequent data access and upload, potentially leading to significantly improved throughput and energy efficiency [23], [24]. Recently, CIM-based NTT accelerators have been proposed using FFT-like algorithms [14], [17]. Theoretically the modular arithmetic operations can be computed parallelly over the memory arrays.…”

Section: Introductionmentioning

confidence: 99%

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RM-NTT: An RRAM-Based Compute-in-Memory Number Theoretic Transform Accelerator

Park

Wang

Yoo

et al. 2022

IEEE J. Explor. Solid-State Comput. Devices Circuits

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As more cloud computing resources are used for machine learning training and inference processes, privacy-preserving techniques that protect data from revealing at the cloud platforms attract increasing interest. Homomorphic encryption (HE) is one of the most promising techniques that enable privacy-preserving machine learning because HE allows data to be evaluated under encrypted forms. However, deep neural network (DNN) implementations using HE are orders of magnitude slower than plaintext implementations. The use of very long polynomials and associated number theoretic transform (NTT) operations for polynomial multiplications are the main bottlenecks of HE implementation for practical uses. This paper introduces RM-NTT, a resistive random-access memory (RRAM) based compute-in-memory (CIM) system to accelerate NTT and inverse NTT (INTT) operations. Instead of running FFT-like algorithms, RM-NTT uses a vector-matrix multiplication (VMM) approach to achieve maximal parallelism during NTT and INTT operations. To improve efficiency, RM-NTT stores modified forms of the twiddle factors in the RRAM arrays to process NTT/INTT in the same RRAM array and employs a Montgomery reduction algorithm to convert the VMM results. The proposed optimization methods allow RM-NTT to significantly reduce NTT operation latency compared with other NTT accelerators, including both CIM and non-CIM based designs. Effects of different RM-NTT design parameters and device non-idealities are also discussed.

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