2016
DOI: 10.1016/j.nima.2016.08.019
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Measurements of timing resolution of ultra-fast silicon detectors with the SAMPIC waveform digitizer

Abstract: 31 pages, 15 figures, accepted by Nuclear Inst. and Methods in Physics Research, AInternational audienceThe SAMpler for PICosecond time (SAMPIC) chip has been designed by a collaboration including CEA/IRFU/SEDI, Saclay and CNRS/LAL/SERDI, Orsay. It benefits from both the quick response of a time to digital converter and the versatility of a waveform digitizer to perform accurate timing measurements. Thanks to the sampled signals, smart algorithms making best use of the pulse shape can be used to improve time r… Show more

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Cited by 30 publications
(18 citation statements)
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References 35 publications
(45 reference statements)
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“…HE idea is to discuss some applications to measure radiations using Fast Silicon detectors that are used in a standard way nowadays in high energy physics at CERN [1,2,3]. We will first describe the principle and methods of the technics that we use and describe in detail two applications related to measurements of cosmic ray in space in collaboration with NASA and of doses received by patients in cancer treatment especially in flash proton therapy.…”
Section: Measurementmentioning
confidence: 99%
“…HE idea is to discuss some applications to measure radiations using Fast Silicon detectors that are used in a standard way nowadays in high energy physics at CERN [1,2,3]. We will first describe the principle and methods of the technics that we use and describe in detail two applications related to measurements of cosmic ray in space in collaboration with NASA and of doses received by patients in cancer treatment especially in flash proton therapy.…”
Section: Measurementmentioning
confidence: 99%
“…In this study, we are using a constant fraction discriminator algorithm (CFD) to estimate the time of a signal with the threshold of 0.5 × amplitude. This module allows to reach a timing accuracy of about 5 ps (SD) between channels from one chip, and slightly worse between different chips [31]. Every channel integrates a discriminator that can trigger independently.…”
Section: Readout Realizationmentioning
confidence: 99%
“…In order to minimize the FEE power consumption an ASIC chip with integrated analogue and digital parts should used. Such an approach was realized in the SAMPIC chip developed by CAE (Saclay, France) and LAL (Orsay, France) [20]. Power consumption of this chip is about 12 mW per channel.…”
Section: Farich System For Sct Detectormentioning
confidence: 99%