Maze routing steiner trees with effective critical sink optimization

Hentschke, Renato Fernandes; Narasimham, Jaganathan; Johann, Marcelo; Reis, Ricardo

doi:10.1145/1231996.1232024

Cited by 10 publications

(10 citation statements)

References 19 publications

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“…Therefore, this implementation, called DAHHK from now on, has better delay results and yields to higher wire lengths when compared to the results obtained from [26]. The same observation is valid for our previous publication [3] as well.…”

Section: B Delay Experimentssupporting

confidence: 76%

“…The main contribution of this paper is to show how to improve an industrial standard routing algorithm by a selection of techniques so that it can beat the quality of state-of-the-art heuristic Steiner tree methods and provide flexibility to tradeoff wire length and delay, while keeping the properties of a routing algorithm and exhibiting fast runtimes. The preliminary version of this paper was presented in ISPD 2007 [3].…”

Section: Introductionmentioning

confidence: 99%

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Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff

Hentschke

Narasimhan

Johann

et al. 2009

IEEE Trans. VLSI Syst.

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Abstract-In this paper, we address the problem of generating good topologies of rectilinear Steiner trees using path search algorithms. Various techniques have been applied in order to achieve acceptable run times on a Maze Router that builds Steiner trees. A biasing technique proposed for wire length improvement, produces trees that are within 2% from optimal topologies in average. By introducing a sharing factor and a path-length factor we show how to trade-off wire length for delay. Experimental results show that our algorithm generates topologies with better delay compared to state of the art heuristics for Steiner trees, such as AHHK (from 26% to 40%) and P-Trees (from 1% to 30% and from 6% to 21% in the presence of blockages) while keeping the properties of a routing algorithm. An important motivation for this work lies in the fact that it can be used for estimation in the early stages as well as for actual routing, thereby improving the convergence and timing closure of the design significantly. We also provide some valuable theoretical background and insights on delay optimization and on how it relates to our maze router implementation.

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Section: B Delay Experimentssupporting

confidence: 76%

Section: Introductionmentioning

confidence: 99%

Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff

Hentschke

Narasimhan

Johann

et al. 2009

IEEE Trans. VLSI Syst.

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show abstract

“…An ant colony optimization based approach is then used to connect the subtrees back into a single tree which is rectilinearized at the end to given an OARSMT. Hentschke et al [18] presented AMAZE, a fast maze routing based algorithm to build Steiner trees. Another recent work on this problem is by Lin et al [19].…”

Section: Introductionmentioning

confidence: 99%

Generation of optimal obstacle-avoiding rectilinear Steiner minimum tree

Qian

Young

2009

Proceedings of the 2009 International Conference on Computer-Aided Design

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ABSTRACT1 In this paper, we present an efficient method to solve the obstacleavoiding rectilinear Steiner tree problem optimally. Our work is developed based on the GeoSteiner approach, modified and extended to allow rectilinear blockages in the routing region. We extended the proofs on the possible topologies of full Steiner tree (FST) in [4] to allow blockages, where FST is the basic concept used in GeoSteiner. We can now handle hundreds of pins with multiple blockages, generating an optimal solution in a reasonable amount of time. This work serves as a pioneer in providing an optimal solution to this difficult problem.

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“…An ant colony optimization based approach is then used to connect the sub-trees back into a single tree which is rectilinearized at the end to given an OARSMT. Hentschke et al [14] presented AMAZE, a fast maze routing based algorithm to build steiner trees. A sharing factor and a path-length factor were introduced to trade-off wire length for delay.…”

Section: Introductionmentioning

confidence: 99%

Obstacle-avoiding rectilinear Steiner tree construction

Young

2008

2008 IEEE/ACM International Conference on Computer-Aided Design

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Abstract-In today's VLSI designs, there can be many blockages in a routing region. The obstacle-avoiding rectilinear Steiner minimum tree (OARSMT) problem has become an important problem in the physical design stage of VLSI circuits. This problem has attracted a lot of attentions in research and several approaches have been proposed to solve this problem effectively. In this paper, we will present a heuristic maze routing based approach to solve this OARSMT problem. It is commonly believed that maze routing based approaches can only handle small scale problems and there is a lack of an effective multi-terminal variant to handle multi-pin nets in practice. We will show in this paper that maze routing based approaches can also handle large scale OARSMT problems effectively. Our approach is based on the searching process as in maze routing and can handle multi-pin nets very well in both solution quality, running time and memory space usage. We have compared our results with those of the previous works and can show that we can out-perform the best previous results on this problem [15] by giving an OARSMT with 2.01% less wire length on average and can make a 27.04% improvement in wire length in comparison with a lower bound of the optimal solution on average, while the running times are all very short and comparable to those in [15]. Besides, due to the flexibility of maze routing, we can handle different kinds of obstacles with different convex or concave rectilinear shapes directly without a need to partition each blockage into a set of rectangular sub-blockages, which will increase the size of the problem.

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Maze routing steiner trees with effective critical sink optimization

Cited by 10 publications

References 19 publications

Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff

Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff

Generation of optimal obstacle-avoiding rectilinear Steiner minimum tree

Obstacle-avoiding rectilinear Steiner tree construction

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