Low Temperature Poly-Si on Flexible Polymer Substrates for Active Matrix Displays and Other Applications

Abstract

A variety of polymer materials including polyimide (PI), polyarylate (PAR), polynorbonene (PNB) and polyethersulphone (PES) have been studied for use as substrates in the formation of active matrix displays based upon polycrystalline silicon (poly-Si) thin film transistors (TFTs). A process used to fabricate transflective mobile phone displays at 250°C on such substrates is described in detail. The NMOS TFTs show a mobility of 100cm2/Vs, and a threshold voltage of 3.9V; the PMOS devices have a mobility of 52cm2/Vs, and a threshold voltage of -6V. Issues relating to performance of these devices, yield of the arrays, and manufacturability are discussed.

Fabricated poly-Si thin film transistor with anodizing Al film using nanoindentation

“…Though most crystallization methods of a-Si reported before have many difficulties in the application to bottom-gate TFTs, the crystallization through anodizing enables both bottom-gate and top-gate TFTs to be applied and the symmetry of the nano-size pore configuration to be achieved. However, too short inter-pore distances of anodic alumina films can deteriorate the crystallization efficiency of a-Si [2][3][4][5]. In this study, we introduced the nano-indentation method which can control inter-pore distances as a solution for these problems and also revealed the seed can be formated in the neutral solution in this process.…”

Deposition and Performance Challenges of Transparent Conductive Oxides on Plastic Substrates

“…If substrate shrinkage occurs or there is a mismatch in thermal expansion, the TCO or device will become strained during the temperature cycling of the deposition process. Typically, a plastic substrate with a CTE < 20 ppm C À1 is preferred to limit the mismatch in thermal expansion with the deposited layers, which can become strained and cracked under thermal cycling [9]. Recent work on thin film mechanical properties has measured the critical strain-to-failure of ITO [$100 nm thin films on 100 mm thick aromatic polyester (AryliteÔ -ARY)], in both bending and tensile testing, to be about 1.5% [10].…”

Low-temperature deposition of highly crystallized silicon films on Al-coated polyethylene napthalate by inductively coupled plasma CVD

“…Low-temperature crystalline silicon films have attracted much attention due to the possibility of large-area deposition, low cost and excellent photoelectric properties for large-area electronics such as solar cells, thin-film transistor arrays of liquid crystal displays and image sensors [1][2][3][4][5][6]. Meanwhile, the portability has been in good demand for applications in personal information display such as e-book, PDA, and hand-held mounts.…”