Low Power Circuit Design Techniques: A Survey

Raj, Nikhil; Singh, Ashutosh Kumar; Gupta, Anil Kumar

doi:10.7763/ijcte.2015.v7.951

Cited by 6 publications

(2 citation statements)

References 16 publications

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“…The scaling down of supply voltage for achieving low power dissipation also has the limitation that threshold voltage of a MOS transistor is not scalable [1]. Many circuit design techniques such as bulkdriven (BD), sub-threshold operation, level shifter, floating-gate (FG) and quasi-floating gate (QFG) have been reported to achieve low power dissipation [2][3][4]. The design of OTA [5], opamp [6,7], linearized OTA for bio-medical application [8,9], self-biased cascode current mirror [10] etc using bulk-driven technique have been reported in literature.…”

Section: Introductionmentioning

confidence: 99%

Multifunction Filter Design Using Bdqfg Miller Ota

Raj¹,

Gupta²

2015

ELELIJ

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In this paper, a low power bulk-driven quasi-floating gate MOSFET based Miller compensated Operational Transconductance Amplifier (OTA) is proposed required particularly in design of Gm-C filter. The analysis of amplifier is compared with low power bulk-driven technique. The performance comparison indicates that bulk-driven quasi floating gate configuration offers better performance. In this configuration the combination of bulk-driven input with quasi-floating gate results in improved transconductance and hence results in high gain and UGB of the OTA. Moreover, simulation of the bulk-driven quasi-floating gate OTA does not suffer from DC convergence problem. A voltage mode multifunction 2 nd order filter design based on proposed BDQFG OTA is also presented. The analysis of all the circuits have been carried out in industry specific node UMC 0.18 micron technology with the help of HSpice simulator.

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Section: Introductionmentioning

confidence: 99%

Multifunction Filter Design Using Bdqfg Miller Ota

Raj¹,

Gupta²

2015

ELELIJ

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“…Only a few, fixed, discrete levels are supported for different operating modes; c) Dynamic Voltage and Frequency Scaling (DVFS): an extension of MVS where a larger number of voltage levels are dynamically switched to follow changing workloads; and. d) Adaptive Voltage Scaling (AVS): an extension of DVFS where a control loop is used to adjust the electrical voltage [2],[7],[12],[22].…”

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confidence: 99%

Emerging trends in the developments of low power design technique

Ilčev

2020

IJET

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In this paper is introduced a low power design technique for developing more reliable, functional, and more cost-effective handheld cellular telephones, portable computers, and peripherals. The portability requirements of handheld computers and other portable devices have placed tremendous pressure on electronic equipment designers, who need to deal with restrictions in the size of electronic units and power consumption. Even though battery technology is continuously improving, including reduced power consumption of processors and displays, extensive and continuous use of network services aggravates these issues. Now the onus is on the research and industrial communities to extend battery life and reduce weight. Equally, research on new techniques and technologies continues, to carefully manage energy consumption in mobile devices, while still providing continuous and fast connections to services and applications. This paper also discusses the novel trends in the developments and advancements in the area of low power Very Large Scale Integration (VLSI) design, dynamic power dissipation static power loss in Complementary Metal Oxide Semiconductor (CMOS), and advanced low power technique. Though low power as a well-established domain that undergone lots of developments from transistor sizing, process shrinkage, voltage scaling, clock gating, etc., to adiabatic logic are elaborated.

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