LAYGEN II—Automatic Layout Generation of Analog Integrated Circuits

Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques

“…In the AIDA flow, after the circuit-level design, the layout generator, AIDA-L [24], takes the device sizes and the best floorplan for selected circuit sizing and generates the complete layout by placing and routing the devices. The generated circuit layout is then saved as a GDS-II stream format, and the physical validation of the results is performed.…”

Floorplan-aware analog IC sizing and optimization based on topological constraints

“…When the templates are loaded, the multi-template floorplanner extracts the topological definitions into a set of B*-Trees using Algorithm 1 from [15]. These B*-Trees will impose the topological constraints defined by the designer during the optimization loop.…”

“…To further increase the geometric exploration during synthesis, while generating the complex layout structures, a new Analog Module Generator (AMG) that extends the degrees of freedom explored during the synthesis, delivering a wide range of layout alternatives for each device, is used. The AMG is a component of AIDA framework and is integrated with both, AIDA-C and AIDA-L. AIDA-L is AIDA's automatic layout generator tool that resulted from the maturation and integration of the LAYGEN-II [15,16] in the framework. This paper is organized as follows.…”

Automatic Layout Optimizations for Integrated MOSFET Power Stages

“…The solution space can be explored by a general random search algorithm. The most common are the simulated annealing (SA) and the genetic algorithms (GA) [8,10].…”