2002
DOI: 10.1063/1.1492861
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Investigation on indium diffusion in silicon

Abstract: The diffusion of indium in silicon has been investigated in the temperature range of 800 to 1000 °C by using secondary ion mass spectroscopy and transmission electron microscopy. Our data indicate that, for implants at 150 keV through a thin oxide layer (19 nm), the amount of dopant that leaves the silicon is only controlled by the flow of indium that reaches the surface, being both the segregation coefficient at the interface SiO2/Si and the indium diffusion coefficient in the oxide favorable to the out-diffu… Show more

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Cited by 52 publications
(40 citation statements)
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“…The intrinsic diffusion parameters of indium in silicon are well established [3]. TED of indium in silicon was also investigated [5,12]. However, there was no information about the diffusion of indium in polycrystalline silicon.…”
Section: Resultsmentioning
confidence: 99%
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“…The intrinsic diffusion parameters of indium in silicon are well established [3]. TED of indium in silicon was also investigated [5,12]. However, there was no information about the diffusion of indium in polycrystalline silicon.…”
Section: Resultsmentioning
confidence: 99%
“…For the samples with indium implantation into the silicon substrate, implantation damage generated excess interstitials. Such excess interstitials promoted indium diffusion, causing transient enhanced diffusion (TED) [5,12]. TED caused some indium atoms to migrate from the silicon substrate into the thin oxide.…”
Section: Methodsmentioning
confidence: 99%
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“…The indium diffusivity into silicon dioxide has been reported to be sufficiently high. 12,13 Moreover, an abnormal shift of C-V characteristics has been reported for Au-SiO 2 -Si capacitors after applying a low-temperature (up 400…”
Section: Resultsmentioning
confidence: 99%
“…Given indium's solid solubility in Si of only ∼1e18 cm −3 , 29 and segregation coefficient of between ∼0.1 and 0.001 in this temperature range studied here, 28,30 indium remains in the SiO 2 over Si. The lack of In diffusion into the Si device layer is advantageous for the CMOS devices which would be processed on this Si layer.…”
Section: P264mentioning
confidence: 99%