Impact of the firing temperature profile on light induced degradation of multicrystalline silicon

Abstract

Light‐ and elevated temperature‐induced degradation in multicrystalline silicon can reduce the efficiency of solar cells significantly. In this work, the influence of the firing process and its temperature profile on the degradation behaviour of neighbouring mc‐Si wafers is analysed. Five profiles with measured high peak temperatures ≥800 °C and varying heating and cooling ramps are examined. With spatially resolved and lifetime calibrated photoluminescence images, normalized defect concentrations N*t are calculated to determine the degradation intensity. Wafers that underwent a fast firing process typical for industrial solar cell production show a significantly stronger degradation than samples that were subjected to the same peak temperature but with slower heating and cooling rates. A spatially resolved analysis of the carrier lifetime in the whole wafer shows that the degradation begins in low lifetime areas around dislocation clusters, spreading into good grains after several hours. By the use of optimized ramp‐up and/or ramp‐down rates during the firing even at very high peak temperatures, light and elevated temperature induced degradation can be suppressed. (© 2016 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)

Rapid thermal anneal activates light induced degradation due to copper redistribution

“…In particular, Eberle et al 27,28 observed that a fast ramp rate in RTA induces strong LeTID, while a slower ramp rate practically eliminates it-which is similar to the behaviour observed in this study. Furthermore, several other studies [29][30][31][32] have consistently reported that the magnitude of LeTID increases with peak firing temperature, with peak temperatures 650 C leading to little or no LeTID, while temperatures between 700 C and 950 C trigger degradation.…”

Light-induced degradation variation in industrial multicrystalline PERC silicon solar cells

“…to above 10% rel. , depending on the wafer bulk and the solar cell processing [1][2][3][4][5][6][7][8]. LeTID formation is particularly sensitive to the peak temperature [3] and the cooling profile of the firing step [4].…”

“…, depending on the wafer bulk and the solar cell processing [1][2][3][4][5][6][7][8]. LeTID formation is particularly sensitive to the peak temperature [3] and the cooling profile of the firing step [4]. PERC cells that have been fired above 675°C [3] and cooled down rapidly show strong homogenous LeTID in the mc grains, with lower defect densities at the grain boundaries [6].…”

“…PERC cells that have been fired above 675°C [3] and cooled down rapidly show strong homogenous LeTID in the mc grains, with lower defect densities at the grain boundaries [6]. Slower cooling in RTP furnaces has resulted in less but still homogenous degradation [4]. Lifetime sample studies have also revealed that the surface passivation layer impacts the LeTID defect density [7,8].…”

Impact of black silicon on light‐ and elevated temperature‐induced degradation in industrial passivated emitter and rear cells

“…LeTID may result in over 10% relative efficiency loss in cells with dielectrically‐passivated rear side, which is a significant issue for the PV industry that is shifting towards passivated emitter and rear cells (PERC) . Hence, several PV research groups, academic institutions, and companies have recently investigated methods to mitigate the detrimental phenomenon, eg, via dark annealing, reduced peak temperature or ramp rates of fast firing, application of high‐intensity illumination at elevated temperature, or phosphorus diffusion gettering of LeTID‐causing impurities …”