Impact of Physical Vapor Deposition-Based In situ Fabrication Method on Metal/High-k Gate Stacks

Watanabe, Heiji; Horie, Shinya; Minami, Takashi; Kitano, Naomu; Kosuda, Motomu; Shimura, Takayoshi; Yasutake, Kiyoshi

doi:10.1143/jjap.46.1910

Cited by 19 publications

(20 citation statements)

References 19 publications

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“…This preparation techniques is called the solid phase interface reaction (SPIR) method. 18 We have previously demonstrated the advantages of the SPIR method for highquality HfLaSiO gate dielectrics. 19 Figure 3 represents the process flow for introducing La into the Hf-silicates.…”

Section: Methodsmentioning

confidence: 99%

Electronic Structure Characterization of La Incorporated Hf-Based High-<I>k</I> Gate Dielectrics by NEXAFS

Yamamoto¹,

Ogawa²,

Kunisu³

et al. 2011

J. Nanosci. Nanotech.

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The electronic structures of lanthunum (La) incorporated hafnium (Hf)-based oxides (HfLaO) and their silicate (HfLaSiO) films were investigated by the Near Edge X-ray Absorption Fine Structure (NEXAFS) technique. The oxygen (O) K-edge spectra, which reflected the hybridized Hf 5d state with the O 2p orbital, were found to reveal features of the unoccupied state of the metal oxides, as well as the conduction-band edge. We also found that, while La incorporation into the Hf-based oxides simply changed the features of the conduction-band structure, subsequent thermal annealing of the La-incorporated films led to a conduction-band edge shift due to an interface silicate reaction and/or local bond rearrangement depending on the La concentration and annealing temperature. The impact of La incorporation into the Hf-based high-k materials on the electronic structure is discussed by taking into account the intrinsic nature of these metal oxides.

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Section: Methodsmentioning

confidence: 99%

Electronic Structure Characterization of La Incorporated Hf-Based High-<I>k</I> Gate Dielectrics by NEXAFS

Yamamoto¹,

Ogawa²,

Kunisu³

et al. 2011

J. Nanosci. Nanotech.

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“…5.68 eV) relative to that of SiO 2 . 15,16 Among the various methods for preparing metal oxide film, dc sputtering, 17 atomic layer deposition (ALD), 18 physical vapor deposition (PVD), 19 and metal organic chemical vapor deposition (MOCVD) 20 appear to be the most useful new technologies. Sol-gel spin-coating is a very efficient approach toward smooth, crack-free films exhibiting excellent surface conformity and uniformity over large areas.…”

Section: Introductionmentioning

confidence: 99%

Improved reliability from a plasma-assisted metal-insulator-metal capacitor comprising a high-k HfO2 film on a flexible polyimide substrate

Meena

Chu

Kuo

et al. 2010

Phys. Chem. Chem. Phys.

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We have used a sol-gel spin-coating process to fabricate a new metal-insulator-metal (MIM) capacitor comprising a 10 nm-thick high-k thin dielectric HfO(2) film on a flexible polyimide (PI) substrate. The surface morphology of this HfO(2) film was investigated using atomic force microscopy and scanning electron microscopy, which confirmed that continuous and crack-free film growth had occurred on the film surface. After oxygen (O(2)) plasma pretreatment and subsequent annealing at 250 degrees C, the film on the PI substrate exhibited a low leakage current density of 3.64 x 10(-9) A cm(-2) at 5 V and a maximum capacitance density of 10.35 fF microm(-2) at 1 MHz. The as-deposited sol-gel film was completely oxidized when employing O(2) plasma at a relatively low temperature (ca. 250 degrees C), thereby enhancing the electrical performance. We employed X-ray photoelectron spectroscopy (XPS) at both high and low resolution to examine the chemical composition of the film subjected to various treatment conditions. The shift of the XPS peaks towards higher binding energy, revealed that O(2) plasma treatment was the most effective process for the complete oxidation of hafnium atoms at low temperature. A study of the insulator properties indicated the excellent bendability of our MIM capacitor; the flexible PI substrate could be bent up to 10(5) times and folded to near 360 degrees without any deterioration in its electrical performance.

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“…The HfSiO layer was then formed by utilizing a solid phase interface reaction between the metal Hf layer and SiO 2 underlayer by annealing in an oxygen partial pressure ͑10 −3 Torr͒ ambient at 850 °C for 1 min. 5 Then, 0.5-nm-thick metal Ti layers were deposited on the HfSiO layer and oxidized by annealing in an oxygen partial pressure ͑10 −3 Torr͒ ambient at 400 °C ͑sample 2͒ and 600 °C ͑sample 3͒ for 1 min. 6 To verify what effects TiO 2 capping would have on the dielectric properties, we prepared HfSiO / SiO 2 ͑1.8 nm SiO 2 thickness͒ gate stacks as a reference sample 1.…”

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confidence: 99%

Charge trapping properties in TiO2∕HfSiO∕SiO2 gate stacks probed by scanning capacitance microscopy

Naitou

Arimura

Kitano

et al. 2008

Applied Physics Letters

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The charge-trapping properties of the high-permittivity titanium oxide-hafnium silicate-silicon dioxide ͑TiO 2 / HfSiO / SiO 2 ͒ gate stacks have been studied using scanning capacitance microscopy. From the bias stress examination of the gate stacks, we concluded that there were electron traps within the films, and these trap densities increased with an increase in the oxidation temperature used for the fabrication of TiO 2 top dielectrics. Furthermore, we found that the distribution of these charged defects was inhomogeneous within the gate stacks. These results are attributed to Ti diffusion through the dielectric layers, which caused electrical defects within the gate stacks.

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Impact of Physical Vapor Deposition-Based In situ Fabrication Method on Metal/High-k Gate Stacks

Cited by 19 publications

References 19 publications

Electronic Structure Characterization of La Incorporated Hf-Based High-<I>k</I> Gate Dielectrics by NEXAFS

Electronic Structure Characterization of La Incorporated Hf-Based High-<I>k</I> Gate Dielectrics by NEXAFS

Improved reliability from a plasma-assisted metal-insulator-metal capacitor comprising a high-k HfO2 film on a flexible polyimide substrate

Charge trapping properties in TiO2∕HfSiO∕SiO2 gate stacks probed by scanning capacitance microscopy

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