High precision constant voltage digital control scheme for primary‐side controlled flyback converter

Xu, Shen; Zhang, Xiaoming; Wang, Chong; Sun, Weifeng

doi:10.1049/iet-pel.2015.0771

Cited by 20 publications

(15 citation statements)

References 15 publications

(26 reference statements)

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“…The standby power of the designed chip is also smaller than that of the chip in [18]. Since the standby power was not measured in [13, 19], it is represented by a short dash in Table 5. Although the output voltage accuracy of the chip in [13] is higher than that of the proposed chip, the structure of it is much more complicated.…”

Section: Experimental Results Of the Systemmentioning

confidence: 99%

Design of a high‐precision constant voltage flyback converter

Wang

et al. 2020

IET Circuits, Devices & Systems

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A small-signal model is established for the basic constant voltage (CV) flyback converter firstly. Then the phase margin and the bandwidth, which can reflect the system stability and rapidity, are deduced through transfer function. The parameters affecting the stability of the system can be obtained by the model's derivation to confirm the appropriate external capacitance value. To improve the precision of CV, the compensation of cable is implemented through the module of irrigation current, pulling down the output voltage under any load conditions to the value of it with the maximal load. The prototype for the proposed CV converter has been fabricated in an MXIC 0.8 μm L80A1 process. The minimal static power consumption measured by a test is only 40 mW. In the CV mode, the precision of the output voltage can reach the level of ±1.5%. Therefore, the proposed control chip has a promising application in low power CV AC-DC flyback converter.

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Section: Experimental Results Of the Systemmentioning

confidence: 99%

Design of a high‐precision constant voltage flyback converter

Wang

et al. 2020

IET Circuits, Devices & Systems

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“…Assuming that continuous conduction modulation (CCM) mode and pulse width modulation (PWM) mode are used, the driver signal, the peak current and the transformer current are illustrated in Figure 1B. [10][11][12] When the switch M1 turns on, the primary inductor ip increases linearly. The output voltage v is sampled from the auxiliary winding.…”

Section: The Proposed Model With Discrete Time Analysismentioning

confidence: 99%

“…The output voltage v is sampled from the auxiliary winding. [10][11][12] When the switch M1 turns on, the primary inductor ip increases linearly. When ip reaches the controlled peak current ic, the switch is turned off, and the primary current ip is transferred to the output side as is.…”

Section: The Proposed Model With Discrete Time Analysismentioning

confidence: 99%

Small‐signal modelling for time‐length compensation algorithm in current controlled converters

Wang

et al. 2019

Circuit Theory & Apps

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A unified small-signal modeling method is proposed for current controlled converters using discrete-time analysis method. The relationship between the controlled current and the duty ratio is performed by discrete-time analysis which automatically incorporates the sample-and-hold effect. The proposed small-signal mode is accurate when the modulation frequency varies from zero to half the switching frequency. It is very easy to apply the proposed model to all current controlled converters. When an amplitude peak in the current-loop gain is observed at half the switching frequency, subharmonic oscillation can be predicted. Based on the proposed model, a time-length compensation algorithm for elimination of subharmonic oscillation can be analyzed while other small-signal modeling methods cannot be applied in this condition. Simulations and experiments are committed to verify the analysis. KEYWORDSdiscrete-time analysis, sample-and-hold effect, small-signal model, subharmonic oscillation, time-length compensation algorithm | INTRODUCTIONCurrent controlled converters such as peak current control and average current control are widely used as better line noise rejection, automatic overload protection, and improved small-signal dynamics. In current controlled converters, the small-signal models based on state-space average model neglect the sample-and-hold effect which only fits for low modulation frequencies. To increase the accuracy of the small-signal models, the sample-and-hold effect is added in the models in. 1-9 The model accuracy is improved from zero to half the switching frequency. However, most of the calculations are always very complicated and hard to understand.To simplify the analysis, a unified model is proposed for current controlled converters based on discrete time analysis which is very easy to implement. The sample-and-hold effect is automatically incorporated, and the relationship between the controlled current and the duty ratio is obtained. Based on state-space average modeling method, small-signal model for current controlled converters can be derived. With the proposed modeling method, a timelength compensation algorithm for elimination of subharmonic oscillation is then analyzed.

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“…1. Usually, a resistor–capacitor–diode (RCD) clamp circuit involved in flyback is used to absorb the leakage energy loss [15, 16]. The loss is proportional to the switching frequency.…”

Section: Introductionmentioning

confidence: 99%

Digitally controlled GaN‐based MHz active clamp flyback converter with dynamic dead time optimisation for AC–DC adapter

2020

IET power electron.

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High precision constant voltage digital control scheme for primary‐side controlled flyback converter

Cited by 20 publications

References 15 publications

Design of a high‐precision constant voltage flyback converter

Design of a high‐precision constant voltage flyback converter

Small‐signal modelling for time‐length compensation algorithm in current controlled converters

Digitally controlled GaN‐based MHz active clamp flyback converter with dynamic dead time optimisation for AC–DC adapter

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