2015 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) 2015
DOI: 10.1109/csics.2015.7314511
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High-Performance GaN-on-Diamond HEMTs Fabricated by Low-Temperature Device Transfer Process

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Cited by 15 publications
(4 citation statements)
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“…The bombardment of the diamond surface with Ar ions induced its amorphization, creating an additional 3 nm-thick amorphous diamond Upon solving these issues, the PAE of 12 × 50 µm GaN/diamond HEMTs increased to 51% and P D to 11.0 W/mm at 10 GHz. For the same V D , the P D of 4 × 50 µm GaN-on-SiC HEMTs was only 9.2 W/mm, showing a 3.5 times areal power increase with GaN-ondiamond HEMTs (Figure 7b) [111]. Even under these conditions, the temperature at the center gates was slightly lower for the GaN-on-diamond HEMT than for the GaN-on-SiC HEMT (195 against 202 • C, respectively).…”
Section: Bonded Wafersmentioning
confidence: 99%
See 1 more Smart Citation
“…The bombardment of the diamond surface with Ar ions induced its amorphization, creating an additional 3 nm-thick amorphous diamond Upon solving these issues, the PAE of 12 × 50 µm GaN/diamond HEMTs increased to 51% and P D to 11.0 W/mm at 10 GHz. For the same V D , the P D of 4 × 50 µm GaN-on-SiC HEMTs was only 9.2 W/mm, showing a 3.5 times areal power increase with GaN-ondiamond HEMTs (Figure 7b) [111]. Even under these conditions, the temperature at the center gates was slightly lower for the GaN-on-diamond HEMT than for the GaN-on-SiC HEMT (195 against 202 • C, respectively).…”
Section: Bonded Wafersmentioning
confidence: 99%
“…Using a different method, Dussaigne et al [127] reported the growth of 1 µm-thick GaN epilayers on 100 nm-thick AlN layers previously deposited on (111) HPHT SCD substrates by ammonia (NH 3 )-source MBE. The films displayed a low RMS roughness of 1.3 nm and some cracks due to the difference in the CTEs of diamond and GaN; cracks were not formed for GaN epilayers with thicknesses lower than 250 nm.…”
Section: Gan Epitaxymentioning
confidence: 99%
“…4. IR images comparing a GaN-on-SiC (left) to a GaN-on Diamond (right) transistor, both DC biased at 20 W Imm dissipated power, adopted with permission from [18].…”
Section: A Diamond Bonded To Ganmentioning
confidence: 99%
“…Starting from the 3D integration in microelectronics, bonding processes are commonly used in the fabrication of micro electro-mechanical systems [1], in heat flow management for high power transistors or photonic devices [2], [3], and more recently in the emerging development of silicon photonics and heterogeneous integration of III-V compounds on a mature silicon platform [4] [5] [6]. In most cases, the bonding of two (or more) different (or not) substrates allows improving the device performances, or the emergence of new components and functionalities which would otherwise not be possible.…”
Section: Introductionmentioning
confidence: 99%