High-Frequency Modeling of TSVs for 3-D Chip Integration and Silicon Interposers Considering Skin-Effect, Dielectric Quasi-TEM and Slow-Wave Modes

Ndip, Ivan; Curran, Brian; Lobbicke, Kai; Guttowski, Stephan; Reichl, H.; Lang, Klaus‐Dieter; Henke, Heino

doi:10.1109/tcpmt.2011.2164915

Cited by 133 publications

(48 citation statements)

References 36 publications

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“…From Eqs. (7,8,9,10), we can get a conclusion that increasing the thickness of dielectric can reduce the whole capacitance and compensate part the loss. S-parameters of the two structures with different thicknesses are shown in Fig.…”

Section: New Structure Used In Tsv Arraymentioning

confidence: 94%

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New coaxial through silicon via (TSV) applied for three dimensional integrated circuits (3D ICs)

Yang

Zheng

Dong

et al. 2016

IEICE Electron. Express

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Coaxial through silicon via (TSV) is a promising technology in three dimensional integrated circuits (3D ICs). Conventional coaxial TSV offers shield around part of the TSV in silicon substrate leave the two ends of TSV and the whole pad without any shield. This paper reports a new coaxial TSV, which offers more shields around TSV and pad with gaps for interconnection. Furthermore, the new structure is more feasible by using double dielectrics with considering deformation and process error. The full-wave extraction simulation result shows that the new structure offers less coupling with adjacent TSVs than conventional coaxial TSV structure does. The losses of new structure is lager but can be reduced by increasing the thickness of gap.

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Section: New Structure Used In Tsv Arraymentioning

confidence: 94%

“…In the previous works, resistance, inductance, conductance and capacitance (RLGC) model and wideband impedance model have been proposed [4,5,6]. In other works, coaxial mixed dielectric TSV and modeling of airgap have been researched [7,8] and 30 Gbps high-speed characterization of coaxial TSV has been proposed [9].…”

Section: Introductionmentioning

confidence: 99%

New coaxial through silicon via (TSV) applied for three dimensional integrated circuits (3D ICs)

Yang

Zheng

Dong

et al. 2016

IEICE Electron. Express

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“…The effect of bonding pads and bumps are not considered. Figure 8 also shows the equivalent circuit model for the TSVs developed in [22]. The TSV parasitic are computed as a function of frequency.…”

Section: Design Of Air-clad Through Silicon Viasmentioning

confidence: 99%

“…The top view of TSVs with an air-gap and silicon dioxide liner is shown in Figure 8. The dimensions of the interposer TSVs specified in [22] are used here. However, the pitch of the TSVs with a silicon dioxide liner and air-gap are adjusted so that the characteristic impedance of the TSV is 50 Ω.…”

Section: Design Of Air-clad Through Silicon Viasmentioning

confidence: 99%

Design and fabrication of ultra low-loss, high-performance 3D chip-chip air-clad interconnect pathway

Uzunlar

Sharma

Saha

et al. 2013

2013 IEEE 63rd Electronic Components and Technology Conference

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In this study, we are pursuing an ultra low-loss interconnect pathway for 3D chip-chip connectivity, incorporating air-clad planar interconnects, air-clad TSVs, and gradual vertical-horizontal transitions. The motivation is to create an air-gap technology that offers the lowest possible effective k-value and near zero loss tangent minimizing the dielectric loss. The design and modeling of air-gap interconnection is presented. The fabrication challenges in airclad interconnect lines are discussed. A monolithic inverted air-gap horizontal transmission line structure is proposed as a means for further decreasing the dielectric loss. Extension of air-clad TSV technology for optical transmission is briefly discussed. IntroductionModern electronic systems are composed of a dense fabric of interconnect lines that connect electronic devices and chips. The scaling of transistors has resulted in miniaturization of individual devices and their interconnects. Smaller crosssectional area of electrical interconnects results in higher signal attenuation and makes data and clock recovery complex. High-speed interconnects have two primary loss mechanisms, namely metallic skin effect losses and dielectric losses. Skin effect loss is a phenomenon where, at high frequencies, the current is crowded into the near-surface region of the metal around the periphery of the conductor. As a result, the effective AC resistance per unit length of conductor increases with frequency. The second loss mechanism deals with dielectric losses. Dielectric losses are directly proportional to frequency and are therefore more pronounced at higher frequencies. Also, resistive losses in the return ground path cannot be ignored and are determined by the geometry and materials constituting the return path. Overall, dielectric losses dominate at frequencies above several GHz [1-2], as shown in Figure 1. This figure was produced with data from the International Technology Roadmap for Semiconductors (ITRS) for signal frequencies up to 50 GHz. As shown in Figure 1, the dielectric loss is more than twice that of the conductor loss at 20 GHz and the dielectric loss becomes more dominant at frequencies above 20 GHz. Thus, in order to achieve meaningful reduction in signal attenuation it is important to find ways to mitigate the dielectric loss at high frequencies. One way of achieving this goal is to use better interconnect and substrate materials.

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“…2. Schematic equivalent electrical model of GSG TSV pair.Then the loop inductance of GSG-type TSVs with frequency up to gigscale[7] can be acquired as (17).…”

mentioning

confidence: 99%

A Model of Air-Gap Through-Silicon Vias (TSVs) for Microwave Applications

Liu

Zhu

Yang

et al. 2015

IEEE Microw. Wireless Compon. Lett.

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In this letter, Ground-Signal-Ground type throughsilicon vias (TSVs) are designed to achieve millimeter wave applications in three-dimensional integrated circuits (3-D ICs). Air-gap is exploited as the insulation layer due to the low permittivity. The accurate wideband equivalent-circuit model are established with frequency up to 20 GHz by using a set of resistance inductance capacitance conductance (RLGC) parameters, which are derived from the different design physical parameters and materials of the TSVs. Good agreements between the proposed models and fullwave simulation of Ansoft's HFSS are shown over a wide frequency range of interest.Index Terms-Air-gap through-silicon vias (TSVs), equivalentcircuit model, GSG-type, high speed three-dimensional integrated circuits (3-D ICs).

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High-Frequency Modeling of TSVs for 3-D Chip Integration and Silicon Interposers Considering Skin-Effect, Dielectric Quasi-TEM and Slow-Wave Modes

Cited by 133 publications

References 36 publications

New coaxial through silicon via (TSV) applied for three dimensional integrated circuits (3D ICs)

New coaxial through silicon via (TSV) applied for three dimensional integrated circuits (3D ICs)

Design and fabrication of ultra low-loss, high-performance 3D chip-chip air-clad interconnect pathway

A Model of Air-Gap Through-Silicon Vias (TSVs) for Microwave Applications

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