High-density SOT-MRAM technology and design specifications for the embedded domain at 5nm node

Gupta, Mohit; Perumkunnil, Manu; Garello, Kévin; Rao, Siddharth; Yasin, F.; Kar, Gouri Sankar; Furnemont, A.

doi:10.1109/iedm13553.2020.9372068

Cited by 26 publications

(17 citation statements)

References 5 publications

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“…The resistance of the MTJ depends on the relative magnetization directions between the free layer and the reference layer. Speciically, if the relative magnetization of the free layer and reference layer are parallel (P), indicating the low resistance (RP); otherwise, if the relative magnetizations are anti-parallel (AP), indicating the high resistance (RAP) [21]. Therefore, one MTJ can store one bit of data depending on the resistance state.…”

Section: Fundamentals Of Stt-mrammentioning

confidence: 99%

Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies

Wang

Zhou

et al. 2023

ACM Trans. Embed. Comput. Syst.

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Energy consumption has been a big challenge for electronic devices, particularly, for the battery-powered Internet of Things (IoT) equipment. To address such a challenge, on one hand, low-power electronic design methodologies and novel power management techniques have been proposed, such as nonvolatile memories and instantly on/off systems; on the other hand, the energy harvesting technology by collecting signals from human activity or the environment has attracted widespread attention in the IoT area. However, the system with self-powered energy harvesting may suffer frequent energy failures or fluctuating energy conditions, which degrade system reliability and user experience. Therefore, how to make the system under unreliable power inputs operate correctly and efficiently is one of the most critical issues for the energy harvesting technology. In this paper, we built an instantly on/off system based on nonvolatile STT-MRAM for IoT applications, which can instantly power on/off under different conditions of the harvested energy. The system powers on and operates normally when the harvested energy is enough (over the preset threshold); otherwise, the system powers off and stores the operational data back to the nonvolatile STT-MRAM. We described implementations of the hardware/software co-designed architecture (with image acquisition as an example) based on the commercialized 32MB STT-MRAM, and experimentally demonstrated the system functionality and efficiency under five typical energy harvesting scenarios, including radio-frequency (RF), thermal, solar, piezoelectric and WIFI. Our experimental results show that the power consumption and data restore time were reduced by 15.1 \(\% \) and 714 times respectively in comparison with the DRAM-based counterpart.

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Section: Fundamentals Of Stt-mrammentioning

confidence: 99%

Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies

Wang

Zhou

et al. 2023

ACM Trans. Embed. Comput. Syst.

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show abstract

“…This is done using compact models that capture the key switching mechanisms and physical properties of the devices, which are deduced from either physics-based or behavioral models [183,230]. Importantly the critical current at 1 ns reduces to 100 µA for a 32 nm track according to SOT compact models [231].…”

Section: Sot Cell Dimension Optimizationmentioning

confidence: 99%

“…Consequently, one will have to consider design strategies with optimal high-performance (HP) but increased FEOL, or with degraded performances but optimal density: highdensity (HD). Keeping in mind these limitations, three alternative bit-cell solutions with four terminals were proposed [231]: shared WL (SOT-SWL) of types 1 and 2, shown in Fig. 13(b) and (c), and shared BL (SOT-SBL) shown in Fig.…”

Section: Bit-cell Configurations and Design Technology Co-optimizationmentioning

confidence: 99%

Spin-orbit torque switching of magnetic tunnel junctions for memory applications

Křižáková

Perumkunnil

Couet

et al. 2022

Journal of Magnetism and Magnetic Materials

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“…A convolutional stride of 6 with no pooling leads to a BR of 13.5×, also with a maximum of 64 weight transistors per pixel 2 . Note, using chip stacking in which weight transistors are integrated vertically on a stacked chip through metal-to-metal fusion bonding [10] or through-silicon-vias (TSVs) [21], minimal to no increase in pixel area is expected because of the dense metal-pitch (MP) and contacted poly-pitch (CPP) [11] of advanced technology nodes and the relatively large sizes of underlying pixel arrays.…”

Section: B Bandwidth Vs Number Of Transistorsmentioning

confidence: 99%

P2M-DeTrack: Processing-in-Pixel-in-Memory for Energy-efficient and Real-Time Multi-Object Detection and Tracking

Datta¹,

Kundu²,

Yin³

et al. 2022

Preprint

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Today's high resolution, high frame rate cameras in autonomous vehicles generate a large volume of data that needs to be transferred and processed by a downstream processor or machine learning (ML) accelerator to enable intelligent computing tasks, such as multi-object detection and tracking. The massive amount of data transfer incurs significant energy, latency, and bandwidth bottlenecks, which hinders real-time processing.To mitigate this problem, we propose an algorithm-hardware codesign framework called Processing-in-Pixel-in-Memory-based object Detection and Tracking (P 2 M-DeTrack). P 2 M-DeTrack is based on a custom faster R-CNN-based model that is distributed partly inside the pixel array (front-end) and partly in a separate FPGA/ASIC (back-end). The proposed front-end in-pixel processing down-samples the input feature maps significantly with judiciously optimized strided convolution and pooling. Compared to a conventional baseline design that transfers frames of RGB pixels to the back-end, the resulting P 2 M-DeTrack designs reduce the data bandwidth between sensor and back-end by up to 24×. The designs also reduce the sensor and total energy (obtained from in-house circuit simulations at Globalfoundries 22nm technology node) per frame by 5.7× and 1.14×, respectively. Lastly, they reduce the sensing and total frame latency by an estimated 1.7× and 3×, respectively. We evaluate our approach on the multi-object object detection (tracking) task of the large-scale BDD100K dataset and observe only a 0.5% reduction in the mean average precision (0.8% reduction in the identification F1 score) compared to the state-of-the-art.

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High-density SOT-MRAM technology and design specifications for the embedded domain at 5nm node

Cited by 26 publications

References 5 publications

Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies

Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies

Spin-orbit torque switching of magnetic tunnel junctions for memory applications

P2M-DeTrack: Processing-in-Pixel-in-Memory for Energy-efficient and Real-Time Multi-Object Detection and Tracking

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