HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware

Šimková, Marcela; Lengál, Ondřej; Kajan, Michal

doi:10.1007/978-3-642-34188-5_22

Cited by 4 publications

(2 citation statements)

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“…Advantageously we can use and modify hardware accelerated verification that uses an FPGA as the acceleration board. An example of such accelerator is the framework HAVEN [21]. The extension of our evaluation platform with the support of functional verification is shown in Figure 9.…”

Section: The Use Of Functional Verification For Automated Evaluamentioning

confidence: 99%

“…Functional verification [21] is the process of verifying that a model of the system, also called DUT or Design Under Test, compliances with the specification by monitoring inputs and outputs in simulation. Moreover, the DUT outputs are compared to the outputs of the reference model (sometimes also referred to as the golden model) that is typically implemented by a verification engineer or a designer than did not implemented the DUT.…”

Section: The Use Of Functional Verification For Automated Evaluamentioning

confidence: 99%

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The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-Mechanical Applications

Podivinsky

Cekan

Šimková

et al. 2014

2014 17th Euromicro Conference on Digital System Design

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The aim of this paper is to present a new platform for estimating the fault-tolerance quality of electro-mechanical applications based on FPGAs. We demonstrate one working example of such EM application that was evaluated using our platform: the mechanical robot and its electronic controller in an FPGA. Different building blocks of the electronic robot controller allow to model different effects of faults on the whole mission of the robot (searching a path in a maze). In the experiments, the mechanical robot is simulated in the simulation environment, where the effects of faults injected into its controller can be seen. In this way, it is possible to differentiate between the fault that causes the failure of the system and the fault that only decreases the performance. Further extensions of the platform focus on the interconnection of the platform with the functional verification environment working directly in FPGA that allows automation and speed-up of checking the correctness of the system after the injection of faults.

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Section: The Use Of Functional Verification For Automated Evaluamentioning

confidence: 99%

Section: The Use Of Functional Verification For Automated Evaluamentioning

confidence: 99%