Harmonic suppression strategy for voltage-controlled grid-connected inverter based on parameter optimization

Wei, Zhang; Hongpeng, Liu; Wei, Wang

doi:10.1109/itec-ap.2017.8080792

Cited by 2 publications

(3 citation statements)

References 14 publications

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“…In (14), the term I in A I (s)T PLL (s) is the PLL output admittance. So, the output equivalent admittance of the grid-tied inverter will be as:…”

Section: Inverter Output Equivalent Admittance Considering Pllmentioning

confidence: 99%

“…Based on (14), the output current of a grid tied inverter is only a function of PCC voltage. Accordingly in [21], it is interpreted that a grid-tied inverter should be considered as a variable admittance subjected to I ref (s).…”

Section: Inverter Output Equivalent Admittance Considering Pllmentioning

confidence: 99%

“…A similar practice regarding the PRCs has been implemented in [13]. A non‐selective current harmonic mitigation method is introduced in [14] for voltage control grid‐tied inverters. This method enjoys the active and reactive powers to define a reference signal which can suppress the effect of grid distortion on the system.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

An enhanced full‐feedforward strategy to mitigate output current harmonics in grid‐tied inverters

Khajeh

Solatialkaran

Zare

et al. 2020

IET Generation Trans & Dist

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The grid‐tied inverters are the most vital components in renewable energy‐based power systems. Hence, maintaining the power quality of a grid‐tied inverter output within the standard range is an ongoing challenge in the power system. The appeared individual harmonics at inverter output current caused by grid voltage harmonics depend on the inverter output equivalent admittance. This consists of a combination of admittance seen from the point of common coupling and the phase‐locked loop path. Therefore, the precise calculation of the aforementioned admittance is an inevitable requirement to design a harmonic mitigation strategy. By adding a virtual admittance to the system through modifications in the inverter control loop, the output equivalent admittance can be removed. For this purpose, in this paper, a novel full‐feedforward harmonic suppression scheme is proposed which can effectively eliminate individual harmonics injected from the grid. Consequently, the individual output current harmonics of the inverter will be effectively suppressed. Simulation and experimental results have been carried out for a typical single‐phase grid‐tied inverter to verify the efficiency of the proposed scheme against emitted harmonics from the grid.

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“…In (14), the term I in A I (s)T PLL (s) is the PLL output admittance. So, the output equivalent admittance of the grid-tied inverter will be as:…”

Section: Inverter Output Equivalent Admittance Considering Pllmentioning

confidence: 99%

Section: Inverter Output Equivalent Admittance Considering Pllmentioning

confidence: 99%

See 1 more Smart Citation

An enhanced full‐feedforward strategy to mitigate output current harmonics in grid‐tied inverters

Khajeh

Solatialkaran

Zare

et al. 2020

IET Generation Trans & Dist

View full text Add to dashboard Buy / Rent full text

show abstract

Harmonic suppression strategy for voltage-controlled grid-connected inverter based on parameter optimization

Cited by 2 publications

References 14 publications

An enhanced full‐feedforward strategy to mitigate output current harmonics in grid‐tied inverters

An enhanced full‐feedforward strategy to mitigate output current harmonics in grid‐tied inverters

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