Giga-sample Data Acquisition Method for High-speed DDR5 SDRAM

Lee, Seunggyu; Yoon, Jae Ik; Lee, Jakang; Kang, Seokhyeong

doi:10.1109/isocc53507.2021.9614030

2021 18th International SoC Design Conference (ISOCC) 2021

DOI: 10.1109/isocc53507.2021.9614030

|View full text |Cite

Giga-sample Data Acquisition Method for High-speed DDR5 SDRAM

Seunggyu Lee

Jae Ik Yoon

Jakang Lee

et al.

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2024

Publication Types

Select...

Article1

Relationship

Self Cite0

Independent1

Authors

Journals

Cited by 1 publication

References 1 publication

Supporting

Mentioning

Contrasting

Order By: Relevance

Design and Simulation of Low-Orbit Satellite Broadcast Signal Receiving and Processing Terminal

Shen,

Li,

Wang

2024

Electronics

View full text Add to dashboard Cite

As an important space-based intelligence acquisition and combat command receiving component, the low-orbit satellite broadcast signal receiving terminal is an important guarantee for realizing the full-dimensional joint operations of our military’s multi-services. This design is based on the SoC platform. Compared to the traditional low-orbit reconnaissance satellite reception and processing terminal business process, a narrowband anti-interference module is added and the interference-to-signal ratio reaches 57 dB and 47 dB when resisting interference from a single frequency band and three frequency bands, respectively. Digital beamforming is used for signal processing and beamforming gain of the whole machine reaches 14–15 dBic; compared to traditional capture and tracking modules, this terminal uses a time domain parallel frequency domain FFT fast acquisition method and a bit synchronization loop is added to the tracking loop to aiming at the problem that the frequency signal acquisition speed is not fast enough and addressing the issue that information symbol rate is not an integer multiple of the pseudo-code, thus complete bit synchronization within 60 ms, with a bit error rate of 0; the coding gain can reach 7 dB. Combined with the solution of decoding and positioning solution algorithms, this scheme used the JFM7K325T chip to complete the design simulation of the complete receiving and processing terminal.

show abstract

Design and Simulation of Low-Orbit Satellite Broadcast Signal Receiving and Processing Terminal

Shen,

Li,

Wang

2024

Electronics

View full text Add to dashboard Cite

show abstract

scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

Contact Info

hi@scite.ai

10624 S. Eastern Ave., Ste. A-614

Henderson, NV 89052, USA

Blog Terms and Conditions API Terms Privacy Policy Contact Cookie Preferences Do Not Sell or Share My Personal Information

Made with 💙 for researchers

Part of the Research Solutions Family.

Giga-sample Data Acquisition Method for High-speed DDR5 SDRAM

Cited by 1 publication

References 1 publication

Design and Simulation of Low-Orbit Satellite Broadcast Signal Receiving and Processing Terminal

Design and Simulation of Low-Orbit Satellite Broadcast Signal Receiving and Processing Terminal

Contact Info

Product

Resources

About