Gate mapping impact on variability robustness in FinFET technology

Brendler, Leonardo H.; Zimpeck, Alexandra L.; Meinhardt, Cristina; Reis, Ricardo

doi:10.1016/j.microrel.2019.113448

Cited by 4 publications

(2 citation statements)

References 12 publications

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“…As for the methods in refs. [202][203][204], fluctuations in the process of manufacture of 2D semiconductor FETs can be evaluated by using the device and circuit loops shown in Figure 13. A similar design flow was used to manufacture the beyond-silicon microprocessor RV16X-NANO based on complementary CNT transistors.…”

Section: Flow Of Simulation Of 2d Materials-based Vlsimentioning

confidence: 99%

The Trend of 2D Transistors toward Integrated Circuits: Scaling Down and New Mechanisms

et al. 2022

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2D transition metal chalcogenide (TMDC) materials, such as MoS2, have recently attracted considerable research interest in the context of their use in ultrascaled devices owing to their excellent electronic properties. Microprocessors and neural network circuits based on MoS2 have been developed at a large scale but still do not have an advantage over silicon in terms of their integrated density. In this study, the current structures, contact engineering, and doping methods for 2D TMDC materials for the scaling‐down process and performance optimization are reviewed. Devices are introduced according to a new mechanism to provide the comprehensive prospects for the use of MoS2 beyond the traditional complementary–metal–oxide semiconductor in order to summarize obstacles to the goal of developing high‐density and low‐power integrated circuits (ICs). Finally, prospects for the use of MoS2 in large‐scale ICs from the perspectives of the material, system performance, and application to nonlogic functionalities such as sensor circuits and analogous circuits, are briefly analyzed. The latter issue is along the direction of “more than Moore” research.

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Section: Flow Of Simulation Of 2d Materials-based Vlsimentioning

confidence: 99%

The Trend of 2D Transistors toward Integrated Circuits: Scaling Down and New Mechanisms

et al. 2022

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“…These process variation sources could lead to significant variability in the critical electrical parameters, such as threshold voltage (V TH ), subthreshold slope (SS), on-state current (I ON ), off-state current (I OFF ), etc. Global and local variations in state-of-the-art IC design using advanced CMOS technology are becoming more critical and sensitive [14,15]. Generally, it is very expensive to study process fluctuations with multiple device architectures and material options to consider through process manufacturing.…”

Section: Introductionmentioning

confidence: 99%

Investigation of process variation in vertically stacked gate-all-around nanowire transistor and SRAM circuit

Sun

Zhuo

et al. 2021

Semicond. Sci. Technol.

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An investigation into the intrinsic process variations including random dopant fluctuation (RDF), interface trap fluctuation, work-function variation (WFV) and oxide thickness variation was undertaken in a vertically stacked gate-all-around nanowire transistor. The fluctuation of the electrical characteristics induced by different sources of variation was discussed. The impact of process variations on static random access memory (SRAM) was also studied. On-state current I ON could be affected by RDF in the source and drain region and the standard deviation can reach 17.2% of the median. WFV can cause obvious fluctuations in threshold voltage V TH and consequently in the read static noise margin (RSNM) of SRAM. It has been discovered that the RSNM was deteriorated by 6.8% by WFV, which causes great uncertainty among all variation sources.

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Using Lyapunov Exponents and Entropy to Estimate Sensitivity to Process Variability

de Almeida Ramos,

Reis

2023

2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

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Gate mapping impact on variability robustness in FinFET technology

Cited by 4 publications

References 12 publications

The Trend of 2D Transistors toward Integrated Circuits: Scaling Down and New Mechanisms

The Trend of 2D Transistors toward Integrated Circuits: Scaling Down and New Mechanisms

Investigation of process variation in vertically stacked gate-all-around nanowire transistor and SRAM circuit

Using Lyapunov Exponents and Entropy to Estimate Sensitivity to Process Variability

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