From Total Store Order to Sequential Consistency: A Practical Reduction Theorem

Cohen, Ernie; Schirmer, Bert

doi:10.1007/978-3-642-14052-5_28

Cited by 23 publications

(15 citation statements)

References 7 publications

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“…By this time, the reader may wonder whether it is always necessary to expose the behaviour of a library with respect to store buffers in its specification. After all, many programs running on TSO only produce SC behaviours, and there are ways of effectively checking this [14,6,7]. Therefore, a valid question is whether we can use the usual definition of linearizability for libraries producing only SC behaviours when they are used by clients also behaving SC.…”

Section: Linearizability On Tsomentioning

confidence: 99%

Concurrent Library Correctness on the TSO Memory Model

Burckhardt

Gotsman

Musuvathi

et al. 2012

Programming Languages and Systems

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Abstract. Linearizability is a commonly accepted notion of correctness for libraries of concurrent algorithms. Unfortunately, it is only appropriate for sequentially consistent memory models, while the hardware and software platforms that algorithms run on provide weaker consistency guarantees. In this paper, we present the first definition of linearizability on a weak memory model, Total Store Order (TSO), implemented by x86 processors. We establish that our definition is a correct one in the following sense: while proving a property of a client of a concurrent library, we can soundly replace the library by its abstract implementation related to the original one by our generalisation of linearizability. This allows abstracting from the details of the library implementation while reasoning about the client. We have developed a tool for systematically testing concurrent libraries against our definition and applied it to several challenging algorithms.

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Section: Linearizability On Tsomentioning

confidence: 99%

Concurrent Library Correctness on the TSO Memory Model

Burckhardt

Gotsman

Musuvathi

et al. 2012

Programming Languages and Systems

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“…For example by automatic static analysis [13], or by respecting a programming discipline that adds to a program the guarantee that its execution will respect sequentially consistent behavior by construction [14]. One way to enforce such a programming discipline is to prove the correctness of the program with a program logic such as concurrent separation logic [15].…”

Section: Weak Memory Model Compliancementioning

confidence: 99%

“…As we mentioned previously, [14] presents a programming discipline to write concurrent programs that allow only sequentially consistent behaviors. [21] points out that this method is not sufficient to deal with programs that edit their own page tables and proposes an extension to complete the programming discipline.…”

Section: Related Workmentioning

confidence: 99%

A Case Study on Formal Verification of the Anaxagoros Hypervisor Paging System with Frama-C

Blanchard

Kosmatov

Lemerre

et al. 2015

Formal Methods for Industrial Critical Systems

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Abstract. Cloud hypervisors are critical software whose formal verification can increase our confidence in the reliability and security of the cloud. This work presents a case study on formal verification of the virtual memory system of the cloud hypervisor Anaxagoros, a microkernel designed for resource isolation and protection. The code under verification is specified and proven in the Frama-C software verification framework, mostly using automatic theorem proving. The remaining properties are interactively proven with the Coq proof assistant. We describe in detail selected aspects of the case study, including parallel execution and counting references to pages, and discuss some lessons learned, benefits and limitations of our approach.

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“…contrast to existing methods which require global conditions to be checked, e.g., [20] checks race conditions, [7,16,25] check linearizability, and [9] checks reduction. We conjecture that more complex examples will indeed require consideration of the behaviour of other processes.…”

Section: Law 2 If P ∈ Proc C and D Are Commands Each C I Is A Commamentioning

confidence: 99%

“…Researchers have considered direct methods, such as executable memory models [22], theorems for reduction [9], and identification of race conditions [20]. Others have linked programs under TSO executions to an abstract specification using linearizability [7,16], however, these use abstract specifications different from the natural abstractions one would expect; [7] requires buffers to be present in the abstract specification, while [16] uses a non-deterministic abstract specification.…”

Section: Introductionmentioning

confidence: 99%

Reasoning Algebraically About Refinement on TSO Architectures

Dongol

Derrick

Smith

2014

Theoretical Aspects of Computing – ICTAC 2014

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Abstract. The Total Store Order memory model is widely implemented by modern multicore architectures such as x86, where local buffers are used for optimisation, allowing limited forms of instruction reordering. The presence of buffers and hardware-controlled buffer flushes increases the level of non-determinism from the level specified by a program, complicating the already difficult task of concurrent programming. This paper presents a new notion of refinement for weak memory models, based on the observation that pending writes to a process' local variables may be treated as if the effect of the update has already occurred in shared memory. We develop an interval-based model with algebraic rules for various programming constructs. In this framework, several decomposition rules for our new notion of refinement are developed. We apply our approach to verify the spinlock algorithm from the literature.

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From Total Store Order to Sequential Consistency: A Practical Reduction Theorem

Cited by 23 publications

References 7 publications

Concurrent Library Correctness on the TSO Memory Model

Concurrent Library Correctness on the TSO Memory Model

A Case Study on Formal Verification of the Anaxagoros Hypervisor Paging System with Frama-C

Reasoning Algebraically About Refinement on TSO Architectures

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