FPGA implementation of FFT blocks for OFDM

Tiwari, Anurag; Phapal, Sanket; Kadam, D. E.; Sivanantham, S.; Sivasankaran, K.

doi:10.1109/get.2015.7453805

Cited by 4 publications

(2 citation statements)

References 7 publications

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“…Finally, Table 6 consolidates the conclusion made from Tables 4 and 5 and reveals the improvements made with the proposed structure in comparison with the results published in [20, 21] in terms of hardware resources, maximum frequency, and throughput. This last metric has been evaluated according to the formula used in [21].…”

Section: Resultssupporting

confidence: 75%

DFT processor implementation scheme based on Rader algorithm

Samiha

Benouaret

Harize

2019

IET Circuits, Devices & Systems

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The implementation of a discrete Fourier transform (DFT) algorithm plays a key role in many real-time applications. This study mainly deals with the design and implementation of a DFT processor with non-power-of-two (prime) problem sizes using the Rader algorithm. The proposed design focuses on increasing the speed to fulfil the requirements of the real-time data transmission by enabling data rates up to 10 Gbps. Despite its limitation to the prime size, it remains a promising tool in the signal processing aspect and takes its place among other techniques to achieve high-speed wireless communication. By avoiding the cumbersome process during twiddle factors computation as well as the butterfly structure, the outcome preludes to an ambitious architecture dedicated to high-speed design reaching over 233 and 92 MHz for DFT lengths of 7 and 67, respectively, on Virtex 6. Thereby, the obtained results prove the efficiency of the algorithm and show the trade-off to be established in terms of occupied area, throughput, latency, and power consumption.

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Section: Resultssupporting

confidence: 75%

DFT processor implementation scheme based on Rader algorithm

Samiha

Benouaret

Harize

2019

IET Circuits, Devices & Systems

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“…empty spectral region is provided, between two adjacent sub-channels. But this results in inadequate use of the ready spectrum [4]. The concept was recommended in the mid-1960s, to handle with this wastefulness, through the advancement of frequency division multiplexing (FDM) with overlapping sub-channels.…”

Section: Introductionmentioning

confidence: 99%

A Survey on Optimization Based Spectrum Sensing Techniques to Reduce ISI and PAPR In OFDM Based Cognitive Radio System

Rao¹,

Baskar²

2019

IJNSA

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Cognitive radio is emerging technologies in OFDM based wireless systems which are very important for spectrum sensing. By using cognitive radio (CR) high data can be transferred with low bit error rate. The key idea of OFDM is to split the total transmission bandwidth into the subcarriers which further reduce the intersymbol interference (ISI) and peak to average power ratio(PAPR) in the signal. There are many optimization based spectrum sensing techniques are existing for efficient sensing purpose but each has its own advantages and disadvantages. This leads to start the comprehensive study for reducing PAPR and ISI(Intersymbol interference) in terms of FPGA based partial configuration. In the first part of review OFDM characteristics of the signal has compared with several optimizations based ISI reduction techniques. The second part is to compare the various spectrum sensing techniques in cognitive radio engine and its application in FPGA. .KEYWORDSCognitive radio, Inter symbol interference (ISI), Spectrum sensing, OFDM

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