FPGA-Based High-Frequency Digital Pulse Width Modulator Architecture for DC-DC Converters

Abstract

Digital pulse width modulator is an integral part in digitally controlled Direct Current to Direct Current (DC-DC) converter utilized in modern portable devices. This paper presents a new Digital Pulse Width Modulator (DPWM) architecture for DC-DC converter using mealy finite state machine with gray code encoding scheme and one hot encoding method to derive the variable duty cycle Pulse Width Modulation (PWM) signal without varying the clock frequency. To verify the proposed DPWM technique, the architecture with control input of six, five and four bits are implemented and the maximum operating frequency along with power consumption results is obtained for different Field Programmable Gate Array (FPGA) devices. The post layout timing results are presented showing that architecture can work with maximum frequency of 326 MHz and derive PWM signal of 3.59 MHz. Experimental results show the implementation of the proposed architecture in low-cost FPGA (Spartan 3A) with on-board oscillator clock frequency of 12 MHz which is multiplied internally by two with Digital Clock Manager (DCM) and derive the PWM signal of 1.5 MHz with a time resolution of 1 ps.

Design and Implementation of Fpga Based Digital Switching Controller for Dc-Dc Converters Used In System- On- A-Chip Applications

“…This gives the PWM pulse with duty cycle of 48% . The duty cycle value of PWM pulse can be changed by changing the data present in the register.Proposed DPWM technique was designed with VHDL and When the clock pulse is given the gray counter starts counting from (0000) G to (1000) G then D0 LSB bit is made high in one hot encoder and it continues till MSB bit D15 bit is made high [10]. When the D15 bit is set to high it sets the RS flip flop, once again the counter starts counting from 0000 to 1000 it again sets the D0 LSB bit in one hot encoder to high state and it continues till the particular bit in one hot encoder is set to high.…”