Floorplanning for mixed macro block and standard cell designs

Shanbhag, Anil; Danda, S.; Sherwani, Naveed A.

doi:10.1109/glsv.1994.290001

Cited by 11 publications

(6 citation statements)

References 4 publications

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“…Early researchers [24,25,22,21] used a hierarchical approach, where the standard cells were first partitioned into blocks using either the logical hierarchy or min-cut-based partitioning algorithms. Floorplanning was then performed on the mix of macro blocks and partitioned blocks, with the goal of minimizing wirelength.…”

Section: Mixed Block Designmentioning

confidence: 99%

Recursive bisection based mixed block placement

Khatkhate

Agnihotri

et al. 2004

Proceedings of the 2004 International Symposium on Physical Design

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Many current designs contain a large number of standard cells intermixed with larger macro blocks. The range of size in these "mixed block" designs complicates the placement process considerably; traditional methods produce results that are far from satisfactory.In this paper we extend the traditional recursive bisection standard cell placement tool Feng Shui to directly consider mixed block designs. On a set of recent benchmarks, the new version obtains placements with wire lengths substantially lower than other current tools. Compared to Feng Shui 2.4, the placements of a Capo-based approach have 29% higher wire lengths, while the placements of mPG are 26% higher. Run times of our tool are also lower, and the general approach is scalable.

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Section: Mixed Block Designmentioning

confidence: 99%

Recursive bisection based mixed block placement

Khatkhate

Agnihotri

et al. 2004

Proceedings of the 2004 International Symposium on Physical Design

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“…1 In the extension to corner stitching proposed by Blust and Mehta [1993], the data structure stores L-shaped tiles (hexagons) in addition to rectangular tiles. This L-shaped variant of corner stitching was motivated by a need for a data structure that could store rectilinear shapes more general than rectangles [Shanbhag et al 1994;Mehta et al 1995]. L-shaped objects, in particular, have been studied in the context of floorplanning [Wang and Wong 1990;Yeap and Sarrafzadeh 1993] and routing [Dai et al 1985;Cai and Wong 1993].…”

Section: Introductionmentioning

confidence: 98%

Efficient decomposition of polygons into L-shapes with application to VLSI layouts

Lopez

Mehta

1996

ACM Trans. Des. Autom. Electron. Syst.

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We present two practical algorithms for partitioning circuit components represented by rectilinear polygons so that they can be stored using the L-shaped corner stitching data structure; that is, our algorithms decompose a simple polygon into a set of nonoverlapping L-shapes and rectangles by using horizontal cuts only. The more general of our algorithms computes an optimal configuration for a wide variety of optimization functions, whereas the other computes a minimum configuration of rectangles and L-shapes. Both algorithms run in O(n ϩ h log h) time, where n is the number of vertices in the polygon and h is the number of H-pairs. Because for VLSI data h is small, in practice these algorithms are linear in n. Experimental results on actual VLSI data compare our algorithms and demonstrate the gains in performance for corner stitching (as measured by different objective functions) obtained by using them instead of more traditional rectangular partitioning algorithms.

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“…If it still fails at level L 0 , we report failure. 7 In fact, the problem can be formulated into a nonlinear programming (NLP) problem where the constraints are the requirement that no two big objects overlap spatially and the objective is to minimize the sum of extra movement due to overlap removal. However, it is very expensive to solve such NLP.…”

Section: B5 Partial Legalization Schemementioning

confidence: 99%

“…However, we also need to move big objects as little as possible from their original locations in order to minimize the extra movement due to the overlap removal and thus make the big objects placement result as consistent with the initial placement of the current level as possible. 7 We use a heuristic method, called longest path compaction, for this problem. It adjusts the distance between non-overlapping big objects in order to push the overlapping big objects away.…”

Section: B4 Complete Legalization Schemementioning

confidence: 99%

“…Therefore, none of them is capable of solving the large-scale mixed-size placement problem alone. A common approach to this problem is to use a hierarchical design flow [5,6,7], where the standard cells are first partitioned into blocks using either the logical hierarchy or min-cut-based partitioning algorithms. Floorplanning is then performed on the partitioned blocks, together with macros for area and wirelength minimization.…”

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confidence: 99%

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Multi-level placement for large-scale mixed-size IC designs

Chang¹,

Cong²,

Yuan³

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003.

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Abstract-In this paper we study the large-scale mixed-size placement problem where there is a significant size variation between big and small placeable objects (the ratio can be as large as 10,000). We develop a multi-level optimization algorithm, MPG-MS, for this problem which can efficiently handle both large-scale designs and large size variations. Compared with the recently published work [1] on large-scale mixed macro and standard cell placement benchmarks for wirelength minimization, our method can achieve 13% wirelength reduction on average with comparable runtime.

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Floorplanning for mixed macro block and standard cell designs

Cited by 11 publications

References 4 publications

Recursive bisection based mixed block placement

Recursive bisection based mixed block placement

Efficient decomposition of polygons into L-shapes with application to VLSI layouts

Multi-level placement for large-scale mixed-size IC designs

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