Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform

Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee

doi:10.1109/apccas.2002.1114975

Cited by 9 publications

(1 citation statement)

References 22 publications

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“…For most multimedia applications, where latency and storage space must be minimized, the passage from 1D to 2D architecture is not a trivial operation [1]. The level by level, line-based [1,30] and block-based [15,30,33] 2D architectures are studied and compared from the point of view of memory requirements, throughput and energy dissipation [30]. Our objective is the conception of 2D-DWT optimized in surface, execution time, memory space and data throughput, in a short time and without the need for special decoding of computed coefficients.…”

Section: D Wavelet Implementationmentioning

confidence: 98%

Design and implementation of optimized architecture for computing the 2D‐DWT for JPEG2000 compression

Souani

Gazzah

Besbes

2009

Circuit Theory & Apps

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SUMMARYTo obtain an effective and efficient system, a multitude of architectural solutions must be assessed and their performances compared. Design and evaluation of several hardware architectures require enormous time for their development and the evaluation. In this paper, an exploration of possible architectures for the 2D-discrete wavelet transform (DWT) is accomplished. Particularly, filters used by the standard JPEG2000 are studied: the lossy 9/7 and the lossless 5/3 filters. The designs have been coded with high description level using Handel-C language and the target hardware is Xilinx FPGA of the Virtex-4 family. It is known that the technique of in-place calculation of the 2D-DWT by lifting scheme allows saving space memory, but the problem is that the computed coefficients are not stored in consecutive addresses, and a system for address decoding becomes necessary. The address decoding must be made at every new decomposition level. We propose then a new simple and efficient technique that allows storing the calculated coefficients in a homogeneous space memory and in consecutive addresses. No additional memory or address decoding is necessary. Finally, the designed system allows a rather high throughput and optimized number of hardware resources.

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Section: D Wavelet Implementationmentioning

confidence: 98%

Design and implementation of optimized architecture for computing the 2D‐DWT for JPEG2000 compression

Souani

Gazzah

Besbes

2009

Circuit Theory & Apps

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Low Complexity Hardware Architectures for Wavelet Transforms: A Survey

Hasan

Dham

Nawaf

2018

IOP Conf. Ser.: Mater. Sci. Eng.

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Memory analysis and architecture for two-dimensional discrete wavelet transform

Huang

Tseng

Chen

2004 IEEE International Conference on Acoustics, Speech, and Signal Processing

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The large amount of the frame memory access and the die area occupied by the embedded internal buffer are the most critical issues for the implementation of two-dimensional discrete wavelet transform (2-D DWT). The former would consume the most power and waste the system memory bandwidth. The latter would enlarge the chip size and also consume much power. In this paper, we categorize and analyze the 2-D DWT architectures by different external memory scan methods. Then the overlapped stripebased scan method is proposed to provide an efficient and flexible implementation for 2-D DWT. The implementation issues of the internal buffer are also discussed, including the lifting-based and convolution-based. Some real-life experiments are given to show that the performance of area and power for the internal buffer is highly related to memory technology and working frequency, instead of the required memory bits only.

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Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform

Cited by 9 publications

References 22 publications

Design and implementation of optimized architecture for computing the 2D‐DWT for JPEG2000 compression

Design and implementation of optimized architecture for computing the 2D‐DWT for JPEG2000 compression

Low Complexity Hardware Architectures for Wavelet Transforms: A Survey

Memory analysis and architecture for two-dimensional discrete wavelet transform

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